P89LPC932A1FA View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

P89LPC932A1FA

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM

Philips Electronics 

Philips Semiconductors

P89LPC932A1

8-bit microcontroller with accelerated two-clock 80C51 core

7.27 Data EEPROM

The P89LPC932A1 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR

based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can

read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides

100,000 minimum erase/program cycles for each byte.

• Byte mode: In this mode, data can be read and written one byte at a time.

• Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The

entire row can be erased by writing 00H.

• Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector

can be erased by writing 00H.

After the operation finishes, the hardware will set the EEIF bit, which if enabled will

generate an interrupt. The flag is cleared by software.

7.28 Flash program memory

7.28.1 General description

The P89LPC932A1 flash memory provides in-circuit electrical erasure and programming.

The flash can be erased, read, and written as bytes. The Sector and Page Erase functions

can erase any flash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase

the entire program memory. ICP using standard commercial programmers is available. In

addition, IAP and byte-erase allows code memory to be used for non-volatile data storage.

On-chip erase and write timing generation contribute to a user-friendly programming

interface. The P89LPC932A1 flash reliably stores memory contents even after

100,000 erase and program cycles. The cell is designed to optimize the erase and

programming mechanisms. The P89LPC932A1 uses VDD as the supply voltage to

perform the Program/Erase algorithms.

7.28.2 Features

• Programming and erase over the full operating voltage range.

• Byte erase allows code memory to be used for data storage.

• Read/Programming/Erase using ISP/IAP/ICP.

• Internal fixed boot ROM, containing low-level IAP routines available to user code.

• Default loader providing ISP via the serial port, located in upper end of user program

memory.

• Boot vector allows user-provided flash loader code to reside anywhere in the flash

memory space, providing flexibility to the user.

• Any flash program/erase operation in 2 ms.

• Programming with industry-standard commercial programmers.

• Programmable security for the code in the flash for each sector.

• 100,000 typical erase/program cycles for each byte.

• 10 year minimum data retention.

9397 750 14871

Product data sheet

Rev. 02 — 10 May 2005

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

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