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P89LPC901 View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
P89LPC901 Datasheet PDF : 55 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
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Table 8: P89LPC902 Special function registers…continued
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
MSB
Bit functions and addresses
LSB
Reset value
Hex Binary
Bit address 8F
8E
8D
8C
8B
8A
89
88
TCON* Timer 0 and 1 control
88H TF1
TR1
TF0
TR0
-
-
-
-
00 00000000
TH0
Timer 0 HIGH
8CH
00 00000000
TH1
Timer 1 HIGH
8DH
00 00000000
TL0
Timer 0 LOW
8AH
00 00000000
TL1
Timer 1 LOW
8BH
00 00000000
TMOD
Timer 0 and 1 mode
89H
-
-
T1M1 T1M0
-
-
T0M1 T0M0 00 00000000
TRIM
Internal oscillator trim register 96H
-
-
TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0 [5] [6]
WDCON Watchdog control register
A7H PRE2 PRE1 PRE0
-
-
WDRUN WDTOF WDCLK [4] [6]
WDL
Watchdog load
C1H
FF 11111111
WFEED1 Watchdog feed 1
C2H
WFEED2 Watchdog feed 2
C3H
[1] All ports are in input only (high impedance) state after power-up.
[2] BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is ‘0’. If any are written while BRGEN = 1, the result is unpredictable.
Unimplemented bits in SFRs (labeled ’-’) are X (unknown) at all times. Unless otherwise specified, ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset values shown for these bits are ‘0’s although they are unknown when read.
[3] The RSTSRC register reflects the cause of the P89LPC901/902/903 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset
value is xx110000.
[4] After reset, the value is 111001x1, i.e., PRE2-PRE0 are all ‘1’, WDRUN = 1 and WDCLK = 1. WDTOF bit is ‘1’ after Watchdog reset and is ‘0’ after power-on reset. Other resets will
not affect WDTOF.
[5] On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
[6] The only reset source that affects these SFRs is power-on reset.
 

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