P87LPC760 View Datasheet(PDF) - Philips Electronics
Part Name
Description
Manufacturer
P87LPC760
Philips Electronics
P87LPC760 Datasheet PDF : 56 Pages
| |||
Philips Semiconductors
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
Preliminary data
P87LPC760
Low Voltage EPROM Operation
The EPROM array contains some analog circuits that are not
required when VDD is less than 4 V, but are required for a VDD
greater than 4 V. The LPEP bit (AUXR.4), when set by software, will
power down these analog circuits resulting in a reduced supply
current. LPEP is cleared only by power-on reset, so it may be set
ONLY for applications that always operate with VDD less than 4 V.
Reset
The P87LPC760 has an integrated power-on reset circuit which
always provides a reset when power is initially applied to the device.
It is recommended to use the internal reset whenever possible to
save external components and to be able to use pin P1.5 as a
general-purpose input pin.
The P87LPC760 can additionally be configured to use P1.5 as an
external active-low reset pin RST by programming the RPD bit in the
User Configuration Register UCFG1 to 0. The internal reset is still
active on power-up of the device. While the signal on the RST pin is
low, the P87LPC760 is held in reset until the signal goes high.
The watchdog timer on the P87LPC760 can act as an oscillator fail
detect because it uses an independent, fully on-chip oscillator.
UCFG1 is described in the System Configuration Bytes section of
this datasheet.
UCFG1.RPD = 1 (default)
UCFG1.RPD = 0
87LPC760
87LPC760
P1.5
Pin is used as
digital input pin
Internal power-on
Reset active
RST
Pin is used as
active-low reset pin
Internal power-on
Reset active
SU01541
Figure 20. Using pin P1.5 as general purpose input pin or as low-active reset pin
RPD (UCFG1.6)
RST/VPP PIN
WDTE (UCFG1.7)
WDT
MODULE
SOFTWARE RESET
SRST (AUXR1.3)
POWER MONITOR
RESET
S
Q
R
RESET
TIMING
CPU
CLOCK
Figure 21. Block Diagram Showing Reset Sources
CHIP RESET
SU01170
2002 Mar 07
26
|
|
Share Link: