Philips Semiconductors
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
Preliminary data
P87LPC760
Name
P2M2#
PCON
PSW*
PT0AD#
Description
SFR
Address
MSB
Port 2 output mode 2
A5h
–
–
Power control register
87h SMOD1 SMOD0
D7
D6
Program status word
D0h
CY
AC
Port 0 digital input disable F6h
Bit Functions and Addresses
–
BOF
D5
F0
–
–
–
POF GF1 GF0
D4
D3
D2
RS1 RS0 OV
LSB
Reset
Value
(P2M2.1) (P2M2.0) 00h1
PD
IDL Note 3
D1
D0
F1
P 00h
00h
9F
9E
9D
9C
9B
9A
99
SCON* Serial port control
98h
SM0
SM1
SM2
REN TB8 RB8
TI
SBUF
Serial port data buffer
99h
register
SADDR# Serial port address
A9h
register
SADEN# Serial port address enable B9h
SP
Stack pointer
81h
98
RI 00h
XXh
00h
00h
07h
TCON*
TH0
TH1
TL0
TL1
TMOD
Timer 0 and 1 control
Timer 0 high byte
Timer 1 high byte
Timer 0 low byte
Timer 1 low byte
Timer 0 and 1 mode
8F
8E
8D
8C
8B
8A
89
88
88h
TF1
TR1
TF0
TR0
–
–
IE0
IT0 00h
8Ch
00h
8Dh
00h
8Ah
00h
8Bh
00h
89h
–
–
M1
M0 GATE C/T
M1
M0 00h
WDCON# Watchdog control register
A7h
–
–
WDOVF WDRUN WDCLK WDS2 WDS1 WDS0 Note 4
WDRST# Watchdog reset register
A6h
XXh
NOTES:
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset value shown in the table for these bits is 0.
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
0000b for all other reset causes if the watchdog is disabled.
2002 Mar 07
7