NBSG14
Table 8. AC CHARACTERISTICS for FCBGA−16
VCC = 0 V; VEE = −3.465 V to −2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V
−40°C
25°C
Symbol
Characteristic
Min
Typ Max Min
Typ Max
fmax
Maximum Frequency
(See Figure 4) (Note 22)
10.7
12
10.7
12
70°C
Min Typ
10.7
12
Max Unit
GHz
tPLH,
Propagation Delay to
100
tPHL
Output Differential
tSKEW
Duty Cycle Skew (Note 23)
Within−Device Skew (Note 24)
Device−to−Device Skew (Note 25)
tJITTER
RMS Random Clock Jitter
(Figure 4) (Note 27)
fin < 10 GHz
Peak−to−Peak Data Dependent Jitter
(Note 28)
fin < 10 Gb/s
VINPP Input Voltage Swing/Sensitivity
75
(Differential Configuration) (Note 26)
125 150 100
2 10
6 15
25 50
0.2 1
2600
75
125 150
100
2
10
6
15
25 50
0.2 1
10
2600
75
125 150 ps
2 10 ps
6 15
25 50
ps
0.2 1
2600 mV
tr
Output Rise/Fall Times
tf
(20% − 80%) @ 1 GHz
Q, Q 20
30 55
20
30 55
20
30 55 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
22. Measured using a 500 mV source, 50% duty cycle clock source. All outputs loaded with 50 W to VCC − 1.5 V. Input edge rates 40 ps
(20% − 80%).
23. See Figure 6. tSKEW = |tPLH − tPHL| for a nominal 50% Differential Clock Input Waveform.
24. Within−Device skew is measured between outputs under identical transitions and conditions on any one device.
25. Device−to−device skew for identical transitions at identical VCC levels.
26. VINPP (MAX) cannot exceed VCC − VEE (applicable only when VCC−VEE < 2600 mV).
27. Additive RMS Jitter with 50% duty cycle clock signal at 10 GHz.
28. Additive Peak−to−Peak data dependent jitter with NRZ PRBS 231−1 data at 10 Gb/s.
http://onsemi.com
8