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NBSG14MNR2G View Datasheet(PDF) - ON Semiconductor

Part Name
Description
Manufacturer
NBSG14MNR2G Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
1
2
A VTCLK Q3
3
4
Q3
Q2
B
CLK VEE VCC
Q2
C
CLK VEE VCC
Q1
D VTCLK
Q0
Q0
Q1
Figure 1. BGA16 Pinout (Top View)
NBSG14
VEE Q0 Q0 VCC
16 15 14 13
Exposed Pad (EP)
VTCLK 1
CLK 2
CLK 3
VTCLK 4
NBSG14
12 Q1
11 Q1
10 Q2
9 Q2
56
VEE Q3
78
Q3 VCC
Figure 2. QFN16 Pinout (Top View)
Table 1. Pin Description
Pin
BGA
QFN
Name
I/O
Description
D1
1
VTCLK
Internal 50 W Termination pin. See Table 2.
C1
2
CLK
ECL, CML,
Inverted Differential Input. Internal 75 kW to VEE and 36.5 kW to VCC.
LVCMOS, LVDS,
LVTTL Input
B1
3
CLK
ECL, CML,
Noninverted Differential Input. Internal 75 kW to VEE.
LVCMOS, LVDS,
LVTTL Input
A1
4
VTCLK
Internal 50 W Termination Pin. See Table 2.
B2,C2
5,16
VEE
Negative Supply Voltage. All VEE Pins must be Externally Connected to
Power Supply to Guarantee Proper Operation.
A2*
A3*
B3,C3
6
Q3
RSECL Output Inverted Differential Output 3. Typically Terminated with 50 W to
VTT = VCC 2 V*
7
Q3
RSECL Output Noninverted Differential Output 3. Typically Terminated with 50 W to
VTT = VCC 2 V*
8,13
VCC
Positive Supply Voltage. All VCC Pins must be Externally Connected to
Power Supply to Guarantee Proper Operation.
A4*
9
Q2
RSECL Output Inverted Differential Output 2. Typically Terminated with 50 W to
VTT = VCC 2 V*
B4*
10
Q2
RSECL Output Noninverted Differential Output 2. Typically Terminated with 50 W to
VTT = VCC 2 V*
C4*
11
Q1
RSECL Output Inverted Differential Output 1. Typically Terminated with 50 W to
VTT = VCC 2 V*
D4*
12
Q1
RSECL Output Noninverted Differential Output 1. Typically Terminated with 50 W to
VTT = VCC 2 V*
D3*
14
Q0
RSECL Output Inverted Differential Output 0. Typically Terminated with 50 W to
VTT = VCC 2 V*
D2*
15
Q0
RSECL Output Noninverted Differential Output 0. Typically Terminated with 50 W to
VTT = VCC 2 V*
N/A
EP
Exposed Pad. The thermally exposed pad on package bottom (see case
drawing) must be attached to a heatsinking conduit.
1. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage, if no
signal is applied then the device will be susceptible to selfoscillation.
*Devices in BGA package typically terminated with 50 W to VTT = VCC 1.5 V.
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