MXD1013C/D012 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MXD1013C/D012 Datasheet PDF : 17 Pages
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3-in-1 Silicon Delay Line
______________________________________________________________Pin Description
8-PIN
DIP/SO/µMAX
1
2
3
4
5
6
7
8
—
PIN
14-PIN DIP
1
3
5
7
8
10
12
14
2, 4, 6, 9, 11,
13
16-PIN SO
1
4
6
8
9
11
13
16
2, 3, 5, 7, 10,
12, 14, 15
NAME
IN1
IN2
IN3
GND
OUT3
OUT2
OUT1
VCC
N.C.
FUNCTION
First Independent Input
Second Independent Input
Third Independent Input
Device Ground
Third Delayed Output
Second Delayed Output
First Delayed Output
Power-Supply Input
Not Connected
_______________Definitions of Terms
Period: The time elapsed between the first pulse’s
leading edge and the following pulse’s leading edge.
Pulse Width (tWI): The time elapsed on the pulse
between the 1.5V level on the leading edge and the
1.5V level on the trailing edge, or vice versa.
Input Rise Time (tRISE): The elapsed time between
the 20% and 80% points on the input pulse’s leading
edge.
Input Fall Time (tFALL): The time elapsed between
the 80% and 20% points on the input pulse’s trailing
edge.
Time Delay, Rising (tPLH): The time elapsed between
the 1.5V level on the input pulse’s leading edge and the
corresponding output pulse’s leading edge.
Time Delay, Falling (tPHL): The time elapsed between
the 1.5V level on the input pulse’s trailing edge and the
corresponding output pulse’s trailing edge.
____________________Test Conditions
Ambient Temperature: +25°C
Supply Voltage (VCC): 5.0V ±0.1V
Input Pulse:
High = 3.0V ±0.1V
Low = 0.0V ±0.1V
Source Impedance:
50Ω max
Rise and Fall Times: 3.0ns max
Pulse Width:
500ns max
Period:
1µs
Each output is loaded with a 74F04 input gate. Delay is
measured at the 1.5V level on the rising and falling
edges. The time delay due to the 74F04 is subtracted
from the measured delay.
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