ML2256 View Datasheet(PDF) - Oki Electric Industry

Part Name

Description

Manufacturer

ML2256

2-Channel Mixing Oki ADPCM Algorithm-Based Speech Synthesis LSI

Oki Electric Industry 

OKI Semiconductor

FEDL2250DIGEST-09

ML2250 family

QFP

ML2256

Pin WCSP pin WCSP pin

24

F5

E6

26

C4

D5

28

F3

E4

29

E3

E3

32

F1

D2

36

D2

D1

37

E1

C2

42

C2

B2

2

B1

C3

6

A3

A4

7, 8

B3, A4

B4

C4

30

F2

E2

13, 40 B5, C1

A6,B1

27

17, 31,

39

F4

C6, D1,

E2

E5

C1,C7,E1

Symbol

D6/SCK

D7/DI

DAO

AOUT

SERIAL

CS

OPTANA

WR

DW

RD

TESTO1

TESTO2

AVDD

DVDD

AGND

DGND

Type

Description

CPU interface data bus pin in the parallel input interface.

Usually outputs “L” level when RD = “L” level.

Works as serial clock input pin in the serial input interface.

I/O

When the SCK input is at “L” level on the falling edge of WR,

RD, DW, the DI input is captured in the device on the rising

edge of SCK clock. And when the SCK input is at “H” level

on the falling edge of WR, RD, DW, the DI input is captured

on the falling edge of SCK clock.

CPU interface data bus pin in the parallel input interface.

I/O Usually output “L” level when RD is at “L” level.

Works as serial data input pin in the serial input interface.

O DAO pin outputs analog signal of 14-bit DAC.

O

AOUT pin usually outputs the analog signal of 14-bit DAC

via voltage follower.

CPU interface switching pin.

I Serial input interface at “H” level. And parallel input interface

at “L” level.

CPU interface chip select pin.

I When CS pin is at “H” level, the WR, DW, and RD signals

cannot be input to the device.

Keep this pin “L” level. The analog signal of 14-bit DAC is

I output from DAO pin and from AOUT pin via voltage

follower.

CPU interface write signal.

I When CS pin is at “H” level, the WR signal cannot be input to

the device.

Data write signal when using EXT command for the voice

output.

I

Set the pin to “H” level when not using EXT command.

When CS pin is at “H” level, the DW signal cannot be input to

the device.

This pin has a pull-up resistor built in.

CPU interface read signal.

I

When CS pin is at “H” level, the RD signal cannot be input to

the device.

This pin has a pull-up resistor built in.

O Output pin for testing.

Keep this pin open.

Analog power supply pin.

— Insert a 0.1 F or larger bypass capacitor between this pin

and AGND pin.

Digital power supply pin.

— Insert a 0.1 F or larger bypass capacitor between this pin

and DGND pin.

— Analog ground pin.

— Digital ground pin.

13/36

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