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S9S08QD4J1VSC View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
S9S08QD4J1VSC
Freescale
Freescale Semiconductor Freescale
S9S08QD4J1VSC Datasheet PDF : 198 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MC9S08QD4 Series Features
8-Bit HCS08 Central Processor Unit (CPU)
• Flash block protect
• 16 MHz HCS08 CPU (central processor
unit)
• HC08 instruction set with added BGND
instruction
• Background debugging system
• Breakpoint capability to allow single
breakpoint setting during in-circuit
debugging (plus two more breakpoints in
on-chip debug module)
• Support for up to 32 interrupt/reset sources
Memory
• Flash read/program/erase over full
operating voltage and temperature
• Flash size:
— MC9S08QD4/S9S08QD4: 4096 bytes
— MC9S08QD2/S9S08QD2: 2048 bytes
• RAM size
— MC9S08QD4/S9S08QD4: 256 bytes
— MC9S08QD2/S9S08QD2: 128 bytes
Power-Saving Modes
• Wait plus three stops
Clock Source Options
ICS — Internal clock source module (ICS)
containing a frequency-locked-loop (FLL)
controlled by internal. Precision trimming
of internal reference allows 0.2% resolution
and 2% deviation over temperature and
voltage.
System Protection
Peripherals
ADC — 4-channel, 10-bit analog-to-digital
converter with automatic compare
function, asynchronous clock source,
temperature sensor and internal bandgap
reference channel. ADC is hardware
triggerable using the RTI counter.
TIM1 — 2-channel timer/pulse-width
modulator; each channel can be used for
input capture, output compare, buffered
edge-aligned PWM, or buffered
center-aligned PWM
TIM2 — 1-channel timer/pulse-width
modulator; each channel can be used for
input capture, output compare, buffered
edge-aligned PWM, or buffered
center-aligned PWM
KBI — 4-pin keyboard interrupt module
with software selectable polarity on edge or
edge/level modes
Input/Output
• Four General-purpose input/output (I/O)
pins, one input-only pin and one
output-only pin. Outputs 10 mA each, 60
mA maximum for package.
• Software selectable pullups on ports when
used as input
• Software selectable slew rate control and
drive strength on ports when used as output
• Internal pullup on RESET and IRQ pin to
reduce customer system cost
Development Support
• Watchdog computer operating properly
(COP) reset with option to run from
dedicated 32 kHz internal clock source or
bus clock
• Low-voltage detection with reset or
interrupt
• Illegal opcode detection with reset
• Illegal address detection with reset
• Single-wire background debug interface
Package Options
• 8-pin SOIC package
• 8-pin PDIP (Only for MC9S08QD4 and
MC9S08QD2)
• All package options are RoHS compliant
 

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