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MC74AC139 View Datasheet(PDF) - ON Semiconductor

Part Name
Description
Manufacturer
MC74AC139
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC74AC139 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MC74AC139, MC74ACT139
E A0 A1
DECODER a
O0 O1 O2 O3
E A0 A1
DECODER b
O0 O1 O2 O3
Figure 2. Logic Symbol
Ea
A0a A1a
Eb
A0b A1b
00a
01a
02a
03a
00b
01b
02b
03b
NOTE:
This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation
delays.
Figure 3. Logic Diagram
FUNCTIONAL DESCRIPTION
The MC74AC139/74ACT139 is a high–speed dual
1–of–4 decoder/demultiplexer. The device has two
independent decoders, each of which accepts two binary
weighted inputs (A0–A1) and provides four mutually
exclusive active–LOW outputs (O0–O3). Each decoder has
an active–LOW enable (E). When E is HIGH all outputs are
forced HIGH. The enable can be used as the data input for
a 4–output demultiplexer application. Each half of the
MC74AC139/74ACT139 generates all four minterms of
two variables. These four minterms are useful in some
applications, replacing multiple gate functions as shown in
Figure 4, and thereby reducing the number of packages
required in a logic network.
E
E
A0
O0
A0
O0
A1
A1
E
E
A0
O1
A0
O1
A1
A1
E
E
A0
O2
A0
O2
A1
A1
E
E
A0
O3
A0
O3
A1
A1
Figure 4. Gate Functions (Each Half)
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