Functional Description
4.15 SLEEP State
The Sleep state is entered by asserting the Sleep Enable (R2/15) bit of the address map. During this mode,
the CLK pin is driven to a static logic low level, and the crystal oscillator is disabled. All digital outputs are
driven to a logic low level.
SPI operations are permitted during this state. The Idle state is entered by de-asserting the Sleep Enable bit
of the address map.
OFF
VCCRF = 0 V
VDDINT = 0 V
Power Up
2.5 V ≤ VCCRF ≤ 3.1 V
1.65 V ≤ VDDINT ≤ VCCRF
RES = 0
Reset
RES = 1
* Can be entered
from any State
Configure
“SPI Load”
Sleep
Wait
XTAL
Sleep EN (R2/15) = 0
Wait
XTAL
Sleep EN (R2/15) = 1
Idle
TX Enable (R2/14) = 0
RX Enable (R2/13) = 0
RTXEN = 0
TX Configure
TX Enable
(R2/14) = 1
RTXEN = 1
TX
Warm Up
RX Enable
(R2/13) = 1
RX Configure
RTXEN = 1
RX
Warm Up
RTXEN = 0
TX Mode
RX Mode
Figure 11. State Diagram
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MC13180 Product Preview
MOTOROLA