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MBM29LV652UE-12 查看數據表(PDF) - Fujitsu

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MBM29LV652UE-12 FLASH MEMORY CMOS 64M (4M × 16) BIT Fujitsu
Fujitsu Fujitsu
MBM29LV652UE-12 Datasheet PDF : 58 Pages
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Hardware Reset Pin
The MBM29LV652UE devices may be reset by driving the RESET pin to VIL. The RESET pin has a pulse
requirement and has to be kept low (VIL) for at least “tRP” in order to properly reset the internal state machine.
Any operation in the process of being executed will be terminated and the internal state machine will be reset
to the read mode “tREADY” after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the
devices require an additional “tRH” before it will allow read access. When the RESET pin is low, the devices will
be in the standby mode for the duration of the pulse and all the data output pins will be tri-stated. If a hardware
reset occurs during a program or erase operation, the data at that particular location will be corrupted.
Accelerated Program Operation
MBM29LV652UE offers accelerated program operation which enables the programming in high speed. If the
system asserts VACC to the ACC pin, the device automatically enters the acceleration mode and the time required
for program operation will reduce to about 50%. This function is primarily intended to allow high speed program,
so caution is needed as the sector group will temporarily be unprotected.
The system would use a fast program command sequence when programming during acceleration mode. Set
command to fast mode and reset command from fast mode is not necessary. When the device enters the
acceleration mode, the device automatically set to fast mode. Therefore, the present sequence could be used
for programming and detection of completion during acceleration mode.
Removing VACC from the ACC pin returns the device to normal operation. Do not remove VACC from the ACC pin
while programming. (See Figure 17)
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