MAX9310A View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX9310A

1:5 Clock Driver with Selectable LVPECL Inputs/Single-Ended Inputs and LVDS Outputs

Maxim Integrated 

1:5 Clock Driver with Selectable LVPECL

Inputs/Single-Ended Inputs and LVDS Outputs

Applications Information

Supply Bypassing

Bypass each VCC to GND with high-frequency surface-

mount ceramic 0.1µF and 0.01µF capacitors in parallel

as close to the device as possible, with the 0.01µF

capacitor closest to the device. Use multiple parallel

vias to minimize parasitic inductance. When using the

VBB reference output, bypass it with a 0.01µF ceramic

capacitor to VCC. If the VBB reference is not used, it

can be left open.

Controlled-Impedance Traces

Input and output trace characteristics affect the perfor-

mance of the MAX9310A. Connect high-frequency

input and output signals to 50Ω characteristic imped-

ance traces. Minimize the number of vias to prevent

impedance discontinuities. Reduce reflections by main-

taining the 50Ω characteristic impedance through

cables and connectors. Reduce skew within a differen-

tial pair by matching the electrical length of the traces.

Output Termination

Terminate the outputs with 100Ω across Q_ and Q_, as

shown in the Typical Application Circuit.

Chip Information

TRANSISTOR COUNT: 716

PROCESS: Bipolar

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