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MAX9039BEBT View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
MAX9039BEBT Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Micropower, Single-Supply, UCSP/SOT23
Comparator + Precision Reference ICs
VIN
IN+
10k
IN-
0.1µF
VCC
VCC
OUT
MAX9039MAX9043
MAX9050MAX9053
VEE
Figure 2. Time Averaging of the Input Signal for Data Recovery
3) In this example, let VCC = 5V and VREF = 2.5V:
VTH
=
2.5
+
2.5
R2
R1
+
R2
and
VTL
=
2.51
R2
R1 + R2
4) Select R2. In this example, we will choose 1k.
5) Select VHYS. In this example, we will choose 50mV.
6) Solve for R1:
VHYS
=
VCC

R2
R1 + R2

0.050
=
5
1000
R1 +1000
where R1 100k, VTH = 2.525V, and VTL = 2.475V.
Board Layout and Bypassing
Power-supply bypass capacitors are not typically need-
ed, but would be called for in cases where supply
impedance is high, supply leads are long, or excessive
noise is expected on the supply lines. Use 100nF
bypass capacitors under these conditions. Minimize
signal trace lengths to reduce stray capacitance.
Reference Output/Load Capacitance
The MAX9039/MAX904_/MAX905_ do not require an
output capacitor on REF for frequency stability. They
are stable for capacitive loads up to 4.7nF. However, in
applications where the load or the supply can experi-
ence step changes, an output capacitor will reduce the
amount of overshoot (or undershoot) and assist the cir-
cuits transient response. When an application is not
subject to transient conditions, the REF capacitor can
be omitted.
Biasing for Data Recovery
Digital data is often embedded into a bandwidth- and
amplitude-limited analog path. Recovering the data can
be difficult. Figure 2 compares the input signal to a
time-averaged version of itself. This self-biases the
threshold to the average input voltage for optimal noise
margin.
Even severe phase distortion is eliminated from the dig-
ital output signal. Be sure to choose R1 and C1 so that:
fCAR >> 1
2πR1C1
where fCAR is the fundamental carrier frequency of the
digital data stream.
UCSP Package Consideration
For general UCSP package information and PC layout
considerations, please refer to Maxim Application
Note,"Wafer-Level Chip-Scale Package."
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. UCSP reliability is integrally linked to the
users assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a UCSP. UCSPs are attached through direct
solder contact to the users PC board, foregoing the
inherent stress relief of a packaged product lead frame.
Solder joint contact integrity must be considered.
Information on Maxims qualification plan, test data,
and recommendations are detailed in the UCSP appli-
cation note, which can be found on Maxims website at
www.maxim-ic.com.
Chip Information
MAX9039 TRANSISTOR COUNT: 193
MAX9040/MAX9041/MAX9050/MAX9051 TRANSISTOR
COUNT: 204
MAX9042/MAX9043/MAX9052/MAX9053 TRANSISTOR
COUNT: 280
10 ______________________________________________________________________________________
 

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