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MAX6723AUTTFD3 View Datasheet(PDF) - Maxim Integrated

Part NameMAX6723AUTTFD3 MaximIC
Maxim Integrated MaximIC
DescriptionDual/Triple, Ultra-Low-Voltage, SOT23 µP Supervisory Circuits
MAX6723AUTTFD3 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Dual/Triple, Ultra-Low-Voltage, SOT23 µP
Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
Reset Threshold Tempco
Reset Threshold Hysteresis
VTH/°C
VHYST Referenced to VTH typical
VCC to Reset Output Delay
tRD
VCC1 = (VTH1+ 100mV) to (VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV)
D1
1.1
D2
8.8
D7 (MAX6797A only)
17.5
D8 (MAX6797A only)
35
Reset Timeout Period
tRP
D3
140
D5
280
D6
560
D4
1120
ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A–MAX6727A)
RSTIN Input Threshold
RSTIN Input Current
VRSTIN
IRSTIN
611
-100
TYP
20
0.5
20
1.65
13.2
26.25
52.5
210
420
840
1680
626.5
MAX
UNITS
ppm/°C
%
µs
2.2
17.6
35
70
ms
280
560
1120
2240
642
mV
+100 nA
RSTIN Hysteresis
3
mV
RSTIN to Reset Output Delay
tRSTIND VRSTIN to (VRSTIN - 30mV)
POWER-FAIL INPUT (MAX6728A/MAX6729A)
PFI Input Threshold
VPFI
PFI Input Current
IPFI
PFI Hysteresis
PFI to PFO Delay
VPFH
tDPF
(VPFI + 30mV) to (VPFI - 30mV)
MANUAL-RESET INPUT (MAX6715A–MAX6722A/MAX6725A–MAX6729A)
MR Input Voltage
VIL
VIH
MR Minimum Pulse Width
MR Glitch Rejection
MR to Reset Delay
tMR
MR Pullup Resistance
WATCHDOG INPUT (MAX6721A–MAX6729A)
Watchdog Timeout Period
First watchdog period after reset timeout
tWD
period
Normal mode
WDI Pulse Width
WDI Input Voltage
WDI Input Current
tWDI
VIL
VIH
IWDI
(Note 2)
WDI = 0V or VCC1
22
µs
611 626.5 642
mV
-100
+100 nA
3
mV
2
µs
0.3 VCC1
V
0.7 VCC1
1
µs
100
ns
200
ns
25
50
80
k
35
54
72
s
1.12 1.68 2.24
50
ns
0.7 VCC1
-1
0.3 VCC1
V
+1
µA
_______________________________________________________________________________________ 3
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