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M93C46-RMC3TP/S View Datasheet(PDF) - STMicroelectronics

Part NameM93C46-RMC3TP/S ST-Microelectronics
STMicroelectronics ST-Microelectronics
Description16 Kbit, 8 Kbit, 4 Kbit, 2 Kbit and 1 Kbit (8-bit or 16-bit wide) MICROWIRE® serial access EEPROM
M93C46-RMC3TP/S Datasheet PDF : 37 Pages
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DC and AC parameters
M93C86, M93C76, M93C66, M93C56, M93C46
Table 21. AC characteristics (M93Cx6-W, device grade 6)
Test conditions specified in Table 13. and Table 10.
Symbol
Alt.
Parameter
Min.
Max.
Unit
tSLQZ
tDF Chip Select low to output Hi-Z
100
ns
tCHQL
tPD0 Delay to output low
200
ns
tCHQV
tPD1 Delay to output valid
200
ns
tW
tWP Erase or Write cycle time
5
ms
1. Chip Select Input (S) must be brought low for a minimum of tSLSH between consecutive instruction cycles.
2. tCHCL + tCLCH 1 / fC.
Table 22. AC characteristics (M93Cx6-W, device grade 3)
Test conditions specified in Table 13. and Table 10.
Symbol Alt.
Parameter
Min.
Max.
Unit
fC
fSK Clock frequency
D.C.
2
MHz
tSLCH
Chip Select low to Clock high
50
ns
tSHCH
tCSS Chip Select set-up time
50
ns
tSLSH(1)
tCS Chip Select low to Chip Select high
200
ns
tCHCL(2)
tSKH Clock high time
200
ns
tCLCH(2)
tSKL Clock low time
200
ns
tDVCH
tDIS Data in set-up time
50
ns
tCHDX
tDIH Data in hold time
50
ns
tCLSH
tSKS Clock set-up time (relative to S)
50
ns
tCLSL
tCSH Chip Select hold time
0
ns
tSHQV
tSV Chip Select to READY/BUSY status
200
ns
tSLQZ
tDF Chip Select low to output Hi-Z
100
ns
tCHQL
tPD0 Delay to output low
200
ns
tCHQV
tPD1 Delay to output valid
200
ns
tW
tWP Erase or Write cycle time
5
ms
1. Chip Select Input (S) must be brought low for a minimum of tSLSH between consecutive instruction cycles.
2. tCHCL + tCLCH 1 / fC.
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Doc ID 4997 Rev 10
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