Integrated circuits, Transistor, Semiconductors Free Datasheet Search and Download Site


M93C46-RMC3TP/S View Datasheet(PDF) - STMicroelectronics

Part NameM93C46-RMC3TP/S ST-Microelectronics
STMicroelectronics ST-Microelectronics
Description16 Kbit, 8 Kbit, 4 Kbit, 2 Kbit and 1 Kbit (8-bit or 16-bit wide) MICROWIRE® serial access EEPROM
M93C46-RMC3TP/S Datasheet PDF : 37 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
M93C86, M93C76, M93C66, M93C56, M93C46
9
Clock pulse counter
Clock pulse counter
In a noisy environment, the number of pulses received on Serial Clock (C) may be greater
than the number delivered by the master (the microcontroller). This can lead to a
misalignment of the instruction of one or more bits (as shown in Figure 7.) and may lead to
the writing of erroneous data at an erroneous address.
To combat this problem, the M93Cx6 has an on-chip counter that counts the clock pulses
from the start bit until the falling edge of the Chip Select Input (S). If the number of clock
pulses received is not the number expected, the WRITE, ERASE, ERAL or WRAL
instruction is aborted, and the contents of the memory are not modified.
The number of clock cycles expected for each instruction, and for each member of the
M93Cx6 family, are summarized in Table 5. to Table 7.. For example, a Write Data to
Memory (WRITE) instruction on the M93C56 (or M93C66) expects 20 clock cycles (for the
x8 organization) from the start bit to the falling edge of Chip Select Input (S). That is:
1 Start bit
+ 2 Op-code bits
+ 9 Address bits
+ 8 Data bits
Figure 7. Write sequence with one clock glitch
S
C
D
START
"0"
"1"
WRITE
An
An-1
An-2
Glitch
D0
ADDRESS AND DATA
ARE SHIFTED BY ONE BIT
AI01395
Doc ID 4997 Rev 10
19/37
Direct download click here
 
HOME 'M93C46-RMC3TP/S' Search
Share Link : 
한국어     日本語     русский     简体中文     español
@ 2015 - 2018  [ Home  ] [ Privacy Policy ] [ Request Datasheet  ] [ Contact Us ]