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M74HCT08M1R データシートの表示(PDF) - STMicroelectronics

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M74HCT08M1R QUAD 2-INPUT AND GATE ST-Microelectronics
STMicroelectronics ST-Microelectronics
M74HCT08M1R Datasheet PDF : 8 Pages
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M74HCT08
QUAD 2-INPUT AND GATE
s HIGH SPEED:
tPD = 13ns (TYP.) at VCC=4.5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS :
VIH = 2V (MIN.) VIL = 0.8V (MAX)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
DESCRIPTION
The M74HCT08 is an high speed CMOS QUAD
2-INPUT AND GATE fabricated with silicon gate
C2MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HCT08B1R
M74HCT08M1R
T&R
M74HCT08RM13TR
M74HCT08TTR
The M74HCT08 is designed to directly interface
HSC2MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/8
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