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M48Z58-70MH1E View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M48Z58-70MH1E
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M48Z58-70MH1E Datasheet PDF : 23 Pages
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M48Z58, M48Z58Y
Operating modes
Table 4. Write mode AC characteristics
Symbol
Parameter(1)
M48Z58/Y
Unit
Min
Max
tAVAV
WRITE cycle time
70
ns
tAVWL Address valid to WRITE enable low
0
ns
tAVEL
Address valid to chip enable low
0
ns
tWLWH WRITE enable pulse width
50
ns
tELEH
Chip enable low to chip enable high
55
ns
tWHAX WRITE enable high to address transition
0
ns
tEHAX Chip enable high to address transition
0
ns
tDVWH Input valid to WRITE enable high
30
ns
tDVEH
Input valid to chip enable high
30
ns
tWHDX WRITE enable high to input transition
5
ns
tEHDX
tWLQZ(2)(3)
tAVWH
tAVEH
tWHQX(2)(3)
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
5
ns
25
ns
60
ns
60
ns
5
ns
1. Valid for ambient operating temperature: TA = 0 to 70°C; VCC = 4.75 to 5.5V or 4.5 to 5.5V (except where
noted).
2. CL = 5pF (see Figure 9 on page 14).
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
2.3
Note:
Data retention mode
With valid VCC applied, the M48Z58/Y operates as a conventional BYTEWIDEâ„¢ static
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs
become high impedance, and all inputs are treated as “Don't care.â€
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below VPFD (min), the
user can be assured the memory will be in a write protected state, provided the VCC fall time
is not less than tF. The M48Z58/Y may respond to transient noise spikes on VCC that reach
into the deselect window during the time the device is sampling VCC. Therefore, decoupling
of the power supply lines is recommended.
When VCC drops below VSO, the control circuit switches power to the internal battery which
preserves data. The internal button cell will maintain data in the M48Z58/Y for an
accumulated period of at least 10 years when VCC is less than VSO.
As system power returns and VCC rises above VSO, the battery is disconnected, and the
power supply is switched to external VCC. Normal RAM operation can resume trec after VCC
exceeds VPFD (max).
For more information on Battery Storage Life refer to the Application Note AN1012.
11/23
 

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