M48Z512A_00 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48Z512A_00 Datasheet PDF : 17 Pages
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M48Z512A, M48Z512AY
Table 2. Absolute Maximum Ratings (1)
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off)
–40 to 70
°C
TBIAS
Temperature Under Bias
–40 to 70
°C
TSLD (2)
Lead Solder Temperature for 10 seconds
260
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
Note: 1. Stresses greater than those listed under â€Absolute Maximum Ratings†may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational section
of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect
reliability.
2. Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
Table 3. Operating Modes
Mod e
VCC
Deselect
Write
Read
4.75V to 5.5V
or
4.5V to 5.5V
Read
E
G
W
DQ0-DQ7
VIH
X
X
High Z
VIL
X
VIL
DIN
VIL
VIL
VIH
DOUT
VIL
VIH
VIH
High Z
Power
Standby
Active
Active
Active
Deselect
VSO to VPFD (min)
X
X
Deselect
≤ VSO
X
X
Note: 1. X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.
X
High Z
CMOS Standby
X
High Z Battery Back-up Mode
Figure 2. DIP Connections
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
32 VCC
2
31 A15
3
30 A17
4
29 W
5
28 A13
6
27 A8
7
26 A9
8 M48Z512A 25
9 M48Z512AY 24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
A11
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
AI02044
DESCRIPTION
The M48Z512A/512AY ZEROPOWER® RAM is a
non-volatile 4,194,304 bit Static RAM organized
as 524,288 words by 8 bits. The device combines
an internal lithium battery, a CMOS SRAM and a
control circuit in a plastic 32 pin DIP Module.
For surface mount environments ST provides a
Chip Set solution consisting of a 28 pin 330mil
SOIC NVRAM Supervisor (M40Z300) and a 32 pin
TSOP Type II (10 x 20mm) LPSRAM (M68Z512)
packages.
The unique design allows the SNAPHAT battery
package to be mounted on top of the SOIC pack-
age after the completion of the surface mount pro-
cess. Insertion of the SNAPHAT housing after
reflow prevents potential battery damage due to
the high temperatures required for device surface-
mounting. The SNAPHAT housing is keyed to pre-
vent reverse insertion.
The SNAPHAT battery package is shipped sepa-
rately in plastic anti-static tubes or in Tape & Reel
form. The part number is â€M4Zxx-BR00SH1â€.
2/17
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