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M48Z35AV-10PC1F View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M48Z35AV-10PC1F Datasheet PDF : 24 Pages
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M48Z35AV
Operating modes
Table 4. Write mode AC characteristics
Symbol
Parameter(1)
M48Z35AV
–100
Min
Max
tAVAV
tAVWL
tAVEL
tWLWH
tELEH
tWHAX
tEHAX
tDVWH
tDVEH
tWHDX
tEHDX
tWLQZ(2)(3)
tAVWH
tAVEH
tWHQX(2)(3)
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
100
0
0
80
80
10
10
50
50
5
5
50
80
80
10
1. Valid for ambient operating temperature: TA = 0 to 70°C; VCC = 3.0 to 3.6V (except where noted).
2. CL = 5pF (see Figure 10 on page 15).
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2.3
Note:
Data retention mode
With valid VCC applied, the M48Z35AV operates as a conventional BYTEWIDEâ„¢ static
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs
become high impedance, and all inputs are treated as “Don't care.â€
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below VPFD(min), the
user can be assured the memory will be in a write protected state, provided the VCC fall time
is not less than tF. The M48Z35AV may respond to transient noise spikes on VCC that reach
into the deselect window during the time the device is sampling VCC. Therefore, decoupling
of the power supply lines is recommended.
When VCC drops below VSO, the control circuit switches power to the internal battery which
preserves data. The internal button cell will maintain data in the M48Z35AV for an
accumulated period of at least 10 years (at 25°C) when VCC is less than VSO.
As system power returns and VCC rises above VSO, the battery is disconnected, and the
power supply is switched to external VCC. Write protection continues until VCC reaches
VPFD(min) plus tREC(min). Normal RAM operation can resume tREC after VCC exceeds
VPFD(max).
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