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M48T58Y-70MH1 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M48T58Y-70MH1
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M48T58Y-70MH1 Datasheet PDF : 31 Pages
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M48T58, M48T58Y
4
Write mode
Write mode
The M48T58/Y is in the WRITE Mode whenever W and E1 are low and E2 is high. The start
of a WRITE is referenced from the latter occurring falling edge of W or E1, or the rising edge
of E2. A WRITE is terminated by the earlier rising edge of W or E1, or the falling edge of E2.
The addresses must be held valid throughout the cycle. E1 or W must return high or E2 low
for a minimum of tE1HAX or tE2LAX from Chip Enable or tWHAX from WRITE Enable prior to
the initiation of another READ or WRITE cycle. Data-in must be valid tDVWH prior to the end
of WRITE and remain valid for tWHDX afterward. G should be kept high during WRITE cycles
to avoid bus contention; although, if the output bus has been activated by a low on E1 and G
and a high on E2, a low on W will disable the outputs tWLQZ after W falls.
Figure 6. Write enable controlled, write AC waveform
A0-A12
E1
E2
tAVE1L
tAVE2H
tAVWL
tAVAV
VALID
tAVWH
tWLWH
tWHAX
W
DQ0-DQ7
tWLQZ
tWHDX
DATA INPUT
tDVWH
tWHQX
AI00963
11/31
 

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