DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

M41T60 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M41T60
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M41T60 Datasheet PDF : 27 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
M41T60
Operation
2.3
WRITE mode
In this mode the master transmitter transmits to the M41T60 slave receiver. Bus protocol is
shown in Figure 10 on page 11. Following the START condition and slave address, a logic
'0' (R/W = 0) is placed on the bus and indicates to the addressed device that word address
An will follow and is to be written to the on-chip address pointer. The data word to be written
to the memory is strobed in next and the internal address pointer is increased to the next
address location on the reception of an acknowledge clock. The M41T60 slave receiver will
send an acknowledge clock to the master transmitter after it has received the slave address
and again after it has received the word address and each data byte.
Figure 10. WRITE mode sequence
BUS ACTIVITY:
MASTER
SDA LINE
S
WORD
ADDRESS (An)
BUS ACTIVITY:
SLAVE
ADDRESS
DATA n
DATA n+1
DATA n+X P
AI00591
Doc ID 10396 Rev 13
11/27
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]