The Flash Memory and PSRAM components have
separate power supplies but share the same
grounds. They are distinguished by three Chip En-
able inputs: EF for the Flash memory and E1P and
E2P for the PSRAM.
Recommended operating conditions do not allow
more than one device to be active at a time. The
most common example is simultaneous read oper-
ations on the Flash memory and the PSRAM
which would result in a data bus contention.
Therefore it is recommended to put the other de-
vices in the high impedance state when reading
the selected device.
Figure 4. Functional Block Diagram
VDDF VPPF VDDQ