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M2401-BN6T View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M2401-BN6T Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
M24C16, M24C08, M24C04, M24C02, M24C01
SUMMARY DESCRIPTION
These I2C-compatible electrically erasable
programmable memory (EEPROM) devices are
organized as 2048/1024/512/256/128 x 8
(M24C16, M24C08, M24C04, M24C02, M24C01).
Figure 2. Logic Diagram
VCC
3
E0-E2
SCL
WC
M24Cxx
SDA
VSS
AI02033
ter. The Start condition is followed by a Device
Select Code and RW bit (as described in Table 2),
terminated by an acknowledge bit.
When writing data to the memory, the device in-
serts an acknowledge bit during the 9th bit time,
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
Table 1. Signal Names
E0, E1, E2
Chip Enable
SDA
Serial Data
SCL
Serial Clock
WC
Write Control
VCC
Supply Voltage
VSS
Ground
These devices are compatible with the I2C memo-
ry protocol. This is a two wire serial interface that
uses a bi-directional data bus and serial clock. The
devices carry a built-in 4-bit Device Type Identifier
code (1010) in accordance with the I2C bus defini-
tion.
The device behaves as a slave in the I2C protocol,
with all memory operations synchronized by the
serial clock. Read and Write operations are initiat-
ed by a Start condition, generated by the bus mas-
Power On Reset: VCC Lock-Out Write Protect
In order to prevent data corruption and inadvertent
Write operations during Power-up, a Power On
Reset (POR) circuit is included. The internal reset
is held active until VCC has reached the POR
threshold value, and all operations are disabled –
the device will not respond to any command. In the
same way, when VCC drops from the operating
voltage, below the POR threshold value, all oper-
ations are disabled and the device will not respond
to any command. A stable and valid VCC must be
applied before applying any logic signal.
Figure 3. DIP, SO and TSSOP Connections
M24Cxx
16Kb /8Kb /4Kb /2Kb /1Kb
NC / NC / NC / E0 / E0 1
NC / NC / E1 / E1 / E1 2
NC / E2 / E2 / E2 / E2 3
VSS 4
8 VCC
7 WC
6 SCL
5 SDA
Note: 1. NC = Not Connected
2. See page 20 (onwards) for package dimensions, and how to identify pin-1.
AI02034E
2/26
 

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