M16C/62N View Datasheet(PDF) - Renesas Electronics

Part Name

Description

Manufacturer

M16C/62N

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Renesas Electronics 

Differences between M16C/62N and M16C/62M

Mitsubishi microcomputers

M16C / 62N Group (80-pin)

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Differences between M16C/62N and M16C/62M

Differences between M16C/62N and M16C/62M(Note)

Item

Shortest instruction

execution time

Supply voltage

Low power

consumption

M16C/62N(80-pin)

M16C/62M(80-pin)

62.5ns (f(XIN)=16MHZ, VCC=3.0V to 3.6V)

142.9ns (f(XIN)=7MHZ, VCC=2.4V to 3.6V

without software wait)

100ns (f(XIN)=10MHZ, VCC=2.7V to 3.6V)

142.9ns (f(XIN)=7MHZ, VCC=2.2V to 3.6V

with software one-wait)

3.0V to 3.6V (f(XIN)=16MHZ, without

software wait)

2.4V to 3.0V (f(XIN)=7MHZ, without

software wait)

2.2V to 3.0V (f(XIN)=7MHZ, with software

one-wait) :mask ROM version

2.7V to 3.6V (f(XIN)=10MHZ, without

software wait)

2.4V to 2.7V (f(XIN)=7MHZ, without

software wait)

2.2V to 2.4V (f(XIN)=7MHZ with

software one-wait)

34.0mW (VCC = 3V, f(XIN)=10MHZ,

without software wait)

66.0mW (VCC = 3.3V, f(XIN)=16MHZ,

without software wait)

28.5mW (VCC = 3V, f(XIN)=10MHZ,

without software wait)

Clock Generating

Circuit

Main clock division rate when main

clock is stopped: Division by 8 mode

Main clock division rate when main

clock is stopped: Does not change

Watchdog timer

Watchdog timer interrupt or reset is

selected

Watchdog timer interrupt

Serial I/O

(IIC bus mode)

Only digital delay is selected as SDA

delay

Analog or digital delay is selected as

SDA delay

A-D converter

10 bits X 8 channels

Expandable up to 18 channels

10 bits X 8 channels

Expandable up to 10 channels

Note: About the details and the electric characteristics, refer to data sheet.

Differences in SFR between M16C/62N and M16C/62M

Address

Register name

M16C/62N(80-pin)

000516

037716

Processor mode register 1 (PM1)

UART2 special mode register

(U2SMR)

b2

Watchdog timer function

select bit

b7 SDA digital delay select bit

("1" when reset)

03D416 A-D control register 2

(ADCON2)

b2, b1

b0

Analog input group

select bit

A-D conversion method

select bit

M16C/62M(80-pin)

b2

Nothing is assigned

b7 SDA digital delay select bit

("0" when reset)

b2,b1 Reserved bits

b0

Reserved bit

03B416

03B616

03B716

Flash identification register

(FIDR)

Flash memory control register 1

(FMR1)

Flash memory control register 0

(FMR0)

Have

Reserved register

b7 Erase status flag

b6 Program status flag

Reserved register

Have

b7 Nothing is assigned

b6 Nothing is assigned

210

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