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M14C04-WW4 View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
M14C04-WW4 Memory Card IC 16/4 Kbit Serial I²C Bus EEPROM ST-Microelectronics
STMicroelectronics ST-Microelectronics
M14C04-WW4 Datasheet PDF : 13 Pages
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M14C16, M14C04
Table 4. Operating Modes
Mode
Current Address Read
Random Address Read
Sequential Read
Byte Write
Page Write
Note: 1. X = VIH or VIL.
RW bit
‘1’
‘0’
‘1’
‘1’
‘0’
‘0’
WC 1
X
X
X
X
VIL
VIL
Bytes
1
1
1
1
16
Initial Sequence
START, Device Select, RW = ‘1’
START, Device Select, RW = ‘0’, Address
reSTART, Device Select, RW = ‘1’
Similar to Current or Random Mode
START, Device Select, RW = ‘0’
START, Device Select, RW = ‘0’
Figure 6. Write Mode Sequences with WC=0
WC
BYTE WRITE
ACK
ACK
ACK
DEV SEL
BYTE ADDR
DATA IN
R/W
WC
PAGE WRITE
WC (cont'd)
PAGE WRITE
(cont'd)
ACK
ACK
ACK
ACK
DEV SEL
BYTE ADDR DATA IN 1
DATA IN 2
DATA IN 3
R/W
ACK
ACK
DATA IN N
AI02804
typical time is shorter. To make use of this, an ACK
polling sequence can be used by the master.
The sequence, as shown in Figure 7, is as follows:
– Initial condition: a Write is in progress.
– Step 1: the master issues a START condition
followed by a device select byte (first byte of the
new instruction).
– Step 2: if the memory is busy with the internal
write cycle, no ACK will be returned and the
master goes back to Step 1. If the memory has
terminated the internal write cycle, it responds
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