NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
9.2 Power consumption
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions (see LPC1315/16/17/45/46/47 user manual):
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIOnDIR registers.
• Write 0 to all GPIOnDATA registers to drive the outputs LOW.
18
IDD
(mA)
12
72 MHz
60 MHz
48 MHz
36 MHz
24 MHz
12 MHz
6 MHz
3 MHz
1 MHz
002aag900
6
0
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
VDD (V)
Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash;
internal pull-up resistors disabled; BOD disabled; all peripherals disabled in the
SYSAHBCLKCTRL register; all peripheral clocks disabled; USB_DP and USB_DM pulled LOW
externally.
1 MHz - 6 MHz: system oscillator enabled; PLL, IRC disabled.
12 MHz: IRC enabled; system oscillator, PLL disabled.
24 MHz - 72 MHz: IRC disabled; system oscillator, PLL enabled.
Fig 10. Typical supply current versus regulator supply voltage VDD in active mode
LPC1315_16_17_45_46_47
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 September 2012
© NXP B.V. 2012. All rights reserved.
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