LPC1315FBD48 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

LPC1315FBD48

32-bit ARM Cortex-M3 microcontroller; up to 64 kB flash; up to 12 kB SRAM; USB device; USART; EEPROM

NXP Semiconductors. 

NXP Semiconductors

LPC1315/16/17/45/46/47

32-bit ARM Cortex-M3 microcontroller

Table 4. Pin description (LPC1345/46/47 - with USB)

Symbol

Description

PIO1_24/CT32B0_MAT0

PIO1_25/CT32B0_MAT1

PIO1_26/CT32B0_MAT2/

RXD

PIO1_27/CT32B0_MAT3/

TXD

PIO1_28/CT32B0_CAP0/

SCLK

PIO1_29/SCK0/

CT32B0_CAP1

PIO1_31

USB_DM

USB_DP

XTALIN

XTALOUT

VDDA

VREFN

27 21 -

21-

14 11 -

15 12 -

31 24 -

[3] I; PU I/O

-

O

[3] I; PU I/O

-

O

[3] I; PU I/O

-

O

-

I

[3] I; PU I/O

-

O

-

O

[3] I; PU I/O

-

I

-

I/O

41 31 - [3] I; PU I/O

-

I/O

-

I

- 25 - [3] I; PU I/O

25 19 13 [8] F

-

26 20 14 [8] F

-

8 6 4 [9] -

-

9 7 5 [9] -

-

59 - -

-

-

48 - -

-

-

PIO1_24 — General purpose digital input/output pin.

CT32B0_MAT0 — Match output 0 for 32-bit timer 0.

PIO1_25 — General purpose digital input/output pin.

CT32B0_MAT1 — Match output 1 for 32-bit timer 0.

PIO1_26 — General purpose digital input/output pin.

CT32B0_MAT2 — Match output 2 for 32-bit timer 0.

RXD — Receiver input for USART.

PIO1_27 — General purpose digital input/output pin.

CT32B0_MAT3 — Match output 3 for 32-bit timer 0.

TXD — Transmitter output for USART.

PIO1_28 — General purpose digital input/output pin.

CT32B0_CAP0 — Capture input 0 for 32-bit timer 0.

SCLK — Serial clock input/output for USART in

synchronous mode.

PIO1_29 — General purpose digital input/output pin.

SCK0 — Serial clock for SSP0.

CT32B0_CAP1 — Capture input 1 for 32-bit timer 0.

PIO1_31 — General purpose digital input/output pin.

USB_DM — USB bidirectional D line. (LPC1345/46/46

only.)

USB_DP — USB bidirectional D+ line. (LPC1345/46/46

only.)

Input to the oscillator circuit and internal clock generator

circuits. Input voltage must not exceed 1.8 V.

Output from the oscillator amplifier.

Analog 3.3 V pad supply voltage: This should be

nominally the same voltage as VDD but should be isolated

to minimize noise and error. This voltage is used to power

the ADC. This pin should be tied to 3.3 V if the ADC are

not used.

ADC negative reference voltage: This should be

nominally the same voltage as VSS but should be isolated

to minimize noise and error. Level on this pin is used as a

reference for ADC.

LPC1315_16_17_45_46_47

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 20 September 2012

© NXP B.V. 2012. All rights reserved.

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