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ST92124DV9Q6 Ver la hoja de datos (PDF) - STMicroelectronics

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ST92124DV9Q6 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD ST-Microelectronics
STMicroelectronics ST-Microelectronics
ST92124DV9Q6 Datasheet PDF : 429 Pages
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ST92F124/F150/F250 - GENERAL DESCRIPTION
Figure 3. ST92F150C(R/V)1/9: Architectural Block Diagram
AS
DS
RW
WAIT
NMI
DS2
RW*
INT[5:0]
INT6*
WKUP[13:0]
WKUP[15:14]*
OSCIN
OSCOUT
RESET
CLOCK2/8
INTCLK
CK_AF
STOUT
ICAPA0
OCMPA0
ICAPB0
OCMPB0*
EXTCLK0*
ICAPA1
OCMPA1
ICAPB1
OCMPB1*
EXTCLK1*
TINPA0
TOUTA0
TINPB0
TOUTB0
TINPA1
TOUTA1
TINPB1
TOUTB1
VREG
FLASH
128/64 Kbytes
E3 TM
1 Kbyte
RAM
2/4 Kbytes
256 bytes
Register File
8/16 bits
CPU
Interrupt
Management
ST9 CORE
RCCU
ST. TIMER
EF TIMER 0
EF TIMER 1
MF TIMER 0
MF TIMER 1
VOLTAGE
REGULATOR
Ext. MEM.
ADDRESS
DATA
Port0
Ext. MEM.
ADDRESS
Ports
1,9*
Fully
Prog.
I/Os
I2C BUS
WATCHDOG
SPI
ADC
SCI M
SCI A*
CAN_0
A[7:0]
D[7:0]
A[10:8]
A[21:11]*
P0[7:0]
P1[7:3]*
P1[2:0]
P2[7:0]
P3[7:4]
P3[3:1]*
P4[7:4]
P4[3:0]*
P5[7:0]
P6[5:2,0]
P6.1*
P7[7:0]
P8[7:0]*
P9[7:0]*
SDA
SCL
WDOUT
HW0SW1
MISO
MOSI
SCK
SS
AVDD
AVSS
AIN[15:8]
AIN[7:0]
EXTRG
TXCLK
RXCLK
SIN
DCD
SOUT
CLKOUT
RTS
RDI
TDO
RX0
TX0
* Not available on 64-pin version.
The alternate functions (Italic characters) are mapped on Port 0, Port 1, Port2, Port3, Port4, Port5, Port6, Port7,
Port8* and Port9*.
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