LPC1751 View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

LPC1751

32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

Philips Electronics 

NXP Semiconductors

5. Block diagram

LPC1759/58/56/54/52/51

32-bit ARM Cortex-M3 microcontroller

debug

port

JTAG

interface

RMII pins USB pins

XTAL1

XTAL2

RESET

TEST/DEBUG

INTERFACE

ARM

CORTEX-M3

I-code D-code

bus

bus

LPC1759/58/56/54/52/51

USB PHY

CLOCK

GENERATION,

DMA

CONTROLLER

ETHERNET

CONTROLLER

WITH DMA(2)

USB HOST/

DEVICE/OTG

CONTROLLER

WITH DMA(4)

POWER CONTROL,

SYSTEM

FUNCTIONS

clocks and

system

master

master

master

controls

bus

slave

ROM

slave

MULTILAYER AHB MATRIX

SRAM

64/32/

16/8 kB

P0, P1,

P2, P4

HIGH-SPEED

GPIO

slave

SCK1

SSEL1

MISO1

MOSI1

RXD0/TXD0

8 × UART1

RD1/2

TD1/2

SCL1

SDA1

SCK/SSEL

MOSI/MISO

2 × MAT0/1

1 × CAP0,

2 × CAP1

PWM1[6:1]

PCAP1[1:0]

AD0[7:2]

P0, P2

RTCX1

RTCX2

VBAT

APB slave group 0

SSP1

UART0/1

CAN1/CAN2(1)

I2C1

SPI0

TIMER 0/1

WDT

PWM1

12-bit ADC

PIN CONNECT

GPIO INTERRUPT CONTROL

32 kHz

OSCILLATOR

RTC

BACKUP REGISTERS

RTC POWER DOMAIN

slave

AHB TO

APB

BRIDGE 0

slave

AHB TO

APB

BRIDGE 1

Grey-shaded blocks represent peripherals with connection to the GPDMA.

Fig 1. Block diagram

slave

FLASH

ACCELERATOR

FLASH

512/256/128/64/32 kB

APB slave group 1

SSP0

UART2/3

I2S(1)

I2C2

RI TIMER

TIMER2/3

EXTERNAL INTERRUPTS

SCK0

SSEL0

MISO0

MOSI0

RXD2/3

TXD2/3

1 × I2SRX

3 × I2STX

TX_MCLK

RX_MCLK

SCL2

SDA2

4 × MAT2

2 × MAT3

EINT0

SYSTEM CONTROL

MOTOR CONTROL PWM

DAC(3)

QUADRATURE ENCODER

(1) LPC1759/58/56 only

(2) LPC1758 only

(3) LPC1759/58/56/54 only

(4) LPC1752/51 USB device only

002aae153

MCOA[2:0]

MCOB[2:0]

MCI[2:0]

AOUT

PHA, PHB

INDEX

LPC1759_58_56_54_52_51_4

Product data sheet

Rev. 04 — 26 January 2010

© NXP B.V. 2010. All rights reserved.

5 of 64

Share Link: