NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
11.6 I2S-bus interface (LPC1759/58/56 only)
Table 12. Dynamic characteristics: I2S-bus interface pins
Tamb = −40 °C to +85 °C.
Symbol Parameter
Conditions
Min
Typ
common to input and output
tr
rise time
tf
fall time
tWH
pulse width HIGH
[1] -
-
[1] -
-
on pins I2STX_CLK and [1] 0.495 × Tcy(clk) -
I2SRX_CLK
tWL
pulse width LOW
on pins I2STX_CLK and [1] -
-
I2SRX_CLK
Max
Unit
35
ns
35
ns
-
-
0.505 × Tcy(clk) ns
output
tv(Q)
data output valid time
on pin I2STX_SDA;
on pin I2STX_WS
[1] -
[1] -
-
30
ns
-
30
ns
input
tsu(D)
data input set-up time
on pin I2SRX_SDA
[1] 3.5
-
-
ns
th(D)
data input hold time
on pin I2SRX_SDA
[1] 4.0
-
-
ns
[1] CCLK = 20 MHz; peripheral clock to the I2S-bus interface PCLK = CCLK⁄4; Tcy(clk) = 1600 ns, corresponds to the SCK signal in the I2S-bus
specification.
I2STX_CLK
I2STX_SDA
Tcy(clk)
tWH
tWL
tv(Q)
I2STX_WS
tv(Q)
Fig 13. I2S-bus timing (output)
tf
tr
002aad992
LPC1759_58_56_54_52_51_4
Product data sheet
Rev. 04 — 26 January 2010
© NXP B.V. 2010. All rights reserved.
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