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LPC1751 View Datasheet(PDF) - Philips Electronics

Part Name
Description
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LPC1751 Datasheet PDF : 64 Pages
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NXP Semiconductors
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
On the LPC1759/58/56/54/52/51, I/O pads are powered by the 3.3 V (VDD(3V3)) pins, while
the VDD(REG)(3V3) pin powers the on-chip voltage regulator which in turn provides power to
the CPU and most of the peripherals.
Depending on the LPC1759/58/56/54/52/51 application, a design can use two power
options to manage power consumption.
The first option assumes that power consumption is not a concern and the design ties the
VDD(3V3) and VDD(REG)(3V3) pins together. This approach requires only one 3.3 V power
supply for both pads, the CPU, and peripherals. While this solution is simple, it does not
support powering down the I/O pad ring “on the fly” while keeping the CPU and
peripherals alive.
The second option uses two power supplies; a 3.3 V supply for the I/O pads (VDD(3V3)) and
a dedicated 3.3 V supply for the CPU (VDD(REG)(3V3)). Having the on-chip voltage regulator
powered independently from the I/O pad ring enables shutting down of the I/O pad power
supply “on the fly”, while the CPU and peripherals stay active.
The VBAT pin supplies power only to the RTC domain. The RTC requires a minimum of
power to operate, which can be supplied by an external battery. The device core power
(VDD(REG)(3V3)) is used to operate the RTC whenever VDD(REG)(3V3) is present. Therefore,
there is no power drain from the RTC battery when VDD(REG)(3V3) is available.
LPC1759_58_56_54_52_51_4
Product data sheet
Rev. 04 — 26 January 2010
© NXP B.V. 2010. All rights reserved.
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