|Description||6/4-Bit VID Programmable Current DAC for Point of Load Regulators with Adjustable Start-Up Current|
|LM10011SDX/NOPB Datasheet PDF : 24 Pages |
SNVS822A – DECEMBER 2012 – REVISED NOVEMBER 2014
7.4 Device Functional Modes
Table 1 lists the functional modes of the LM10011 device.
MODE PIN CONNECTION
Table 1. Mode Pin Summary
7.5.1 VID Programming, 6-Bit Mode
Four pins are used to communicate with the LM10011. In 6-bit mode (MODE = 0), VIDA, VIDB, and VIDC are
data lines, while VIDS is a latching strobe that programs in the LM10011 data. As shown in the 6-bit mode timing
diagram of Figure 1, the falling edge of VIDS latches in the data from VIDA, VIDB, and VIDC as the lower three
LSB of the IDAC_OUT value, [2:0]. After a minimum hold time (t2), the rising edge of VIDS latches in the data
from VIDA, VIDB, and VIDC as the upper three LSB of the IDAC_OUT value, [5:3]. Internally, a delay (t3,t1) on
VIDS allows for the setting of all VIDA, VIDB, and VIDC lines to change simultaneously as VIDS rises or falls.
7.5.2 VID Programming, 4-Bit Mode
The LM10011 includes a 4-bit mode to facilitate parallel VID communication. In 4-bit mode (MODE = 1), VIDC,
VIDB, VIDA, and VIDS are all parallel data lines. As shown in the 4-bit mode timing diagram in Figure 1, a
changing edge of any of the VID communication lines will change the IDAC_OUT current to the corresponding
new 4-bit value found on the data lines. There is a 3-μs deglitch filter to eliminate spurious noise events. The
data must overcome the deglitch time and the minimum hold time (t7) or else the IDAC_OUT pin current may not
reflect the value indicated at the VID data inputs. During the hold time, no other data line can be transitioned.
As mentioned in a previous section, for both the 4-bit and 6-bit mode, the VID data word is set so that the lowest
output current is seen at the highest VID data word (59.2 µA at a code of 0d in 6-bit mode and 56.4 µA in 4-bit
mode). Conversely, the lowest current is seen at the highest VID data word (0.06 µA at 63d or 15d). During VID
operation with the regulator, this will translate to the lowest output voltage with the lowest VID word, 0d, and the
highest output voltage with the highest VID word, 63d or 15d. The communications pins can be used with a low-
voltage microcontroller with a maximum VIL of 0.75 V and a minimum VIH of 1.0 V.
7.5.3 Programming the Start-Up Current
Depending on the value of RSET during start-up (when VDD > VUVLO_R and EN > VEN), the output current on
the IDAC_OUT pin will take on 1 of 16 discrete values corresponding to the currents available in the 4-bit mode.
These discrete start-up currents can be programmed by connecting a resistor (RSET) from the SET pin to GND. If
the EN voltage is toggled or a UVLO is triggered during operation, the current will default back to the value set by
the RSET resistor. It takes only one VID command transition in either 4-bit or 6-bit mode to change the current to
something other than the pre-programmed start-up current. The required RSET resistors and their corresponding
start-up currents codes can be found in Table 2.
Table 2. Start-Up–4-Bit Mode Currents with Corresponding RSET Values and Output Currents
NOMINAL IDAC_OUT CURRENT (µA)
Copyright © 2012–2014, Texas Instruments Incorporated
Product Folder Links: LM10011
Submit Documentation Feedback
|Direct download click here|
|Share Link :|