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LC78833 View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LC78833 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
LC78833M, 78833V
3. Initialization
These ICs must be initialized when power is first applied and when the system clock frequency is changed.
Initialization is performed by applying a low level to the INITB pin. That low level must be held for at least one full
cycle of the LRCK signal after the power supply voltage has stabilized and the SYSCLK, BCLK, and LRCK signals
have been applied.
When INITB is low, all 16 bits of the digital filter outputs go to 0, and the D/A converter outputs (CH1OUT and
CH2OUT) go to the analog 0 level, which is a potential equal to (REFH +REFL)/2.
4. System Clock
These ICs support a 384fs system clock. Apply a 384fs clock to the SYSCLK pin.
• CKOUT pin
The SYSCLK and CKOUT pins are related as shown in the figure below.
No. 5212-7/11
 

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