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LB11870 View Datasheet(PDF) - SANYO -> Panasonic

Part Name
Description
Manufacturer
LB11870 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LB11870
Continued from preceding page.
Pin No. Symbol
Pin Description
25
FGFIL FG filter connection.
If noise on the FG signal input is a problem,
insert a capacitor (up to about 2200pF)
between this pin and ground.
Equivalent Circuit
VREG
25
26
CSD
Sets the rotor constraint protection circuit
operating time and the initial reset pulse.
VREG
A protection operating time of about 8 seconds
can be set by insert a capacitor of about
0.068μF between this pin and ground. If the
rotor constraint protection circuit is not used,
insert a resistor and a capacitor in parallel
between this pin and ground. (Values: about
220kΩ and 4700pF)
27
CLD
Sets the phase lock state signal mask time.
A mask time of about 90ms can be set by
inserting a capacitor of about 0.1μF between
this pin and ground.
Leave this pin open if masking is not required.
VREG
28
FGS
FG Schmitt output.
VREG
29
LD
Phase lock state detection output.
This output goes to the on state (low level)
when the phase is locked.
VREG
300Ω
26
300Ω
27
28
29
Continued on next page.
No.7256-9/14
 

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