Transistors,MosFET ,Diode,Integrated circuits

## L4987 데이터 시트보기 (PDF) - STMicroelectronics

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L4987 Datasheet PDF : 11 Pages
 1 2 3 4 5 6 7 8 9 10
L4987 SERIES
APPLICATION HINT OF L4987CPT30
How to use the control flag
The flag produces a logic ”low” whenever the
output fall out out of regulation. An ”out of
regulation condition can result from:
1) Low Input Voltage (VIN VOUT + VDROP)
2) Curent Limiting
3) Thermal Limiting
Figure 1 to 2 show the typical behaviour of the
output voltage and the control flag versus the
input voltage and the temperatre. No hysteresis is
implemented; so the response of VOUT and VFLAG
are the same either when the VIN ramps up or
down.
The control flag is an open collector which
requires an external pull-up resistor. This may be
connected to the regulator output (Figure 3) or
some other supply voltage (Figure 4).
Using the regulator output prevents an invalid
”high” on the flag which occurs if it is pulled up to
an external voltage while the regulator input
voltage is reduced below about 2V (Figue 5).
Concerning the pull-up resistor its value must be
properly chosen as suggested below. When ”low”
as it is possible to see in figure 6 the control flag
voltage is:
VFLAG(LOW) = VCE = 0.5 = VSUPPLY - RPULL x IFL
VSUPPLY is chosen by design and, thus is known,
while IFL must be at maximum 10mA. Then
0.5V VSUPPLY - RPULL x 10mA
The minimum value of RPULL, is, so, determined
by the following equation:
RPULL(min)
VSUPPLY
-
0.5
10 mA
Regarding the maximum value of RPULL note that
its value depends of the type of logic used
(CMOS, TTL etc.), the transistor leackage current
and the presence or not of a load on VFLAG.
The following example shows how to determine
the RPULL max in the case of CMOS logic, no
load and 10µA (for L4978 it is the maximum value
of IFH) of control flag leakage current.
Becaause of CMOS logic:
VFLAG(HIGH)
2
3
VSUPPLY
But:
VFLAG(HIGH)
=
VSUPPLY
-
RPULL
x
IFH
2
3
VSUPPLY
so, the maximum value is determined by the
following equation:
RPULL(MAX)
1
3
VSUPPLY
10 A
Figure 1: Output and Flag Voltage vs Input
Figure 2: Flag Voltage vs Input
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