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ISL83384ECAZA View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ISL83384ECAZA ±15kV ESD Protected/ +3V to +5.5V/ +/-1 Microamp/ 250kbps/ RS-232 Transmitters/Receivers Intersil
Intersil Intersil
ISL83384ECAZA Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
ISL83384E
Capacitor Selection
The charge pumps require 0.1µF or greater capacitors for
operation with 3.3V VCC 5.5V. Increasing the capacitor
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C2, C3,
and C4 can be increased without increasing C1’s value,
however, do not increase C1 without also increasing C2, C3,
and C4 to maintain the proper ratios (C1 to the other
capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Operation Down to 2.7V
ISL83384E transmitter outputs meet RS-562 levels (±3.7V),
at the full data rate, with VCC as low as 2.7V. RS-562 levels
typically ensure interoperability with RS-232 devices.
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 5 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kin parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
5V/DIV
SHDN
T1
2V/DIV
High Data Rates
The ISL83384E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 6
details a transmitter loopback test circuit, and Figure 7
illustrates the loopback test result at 120Kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120Kbps. Figure 8 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250Kbps. The static transmitter was also
loaded with an RS-232 receiver.
VCC
0.1µF
+
+
C1
+
C2
VCC
C1+
VCC
V+
C1-
ISL83384E
C2+
V-
C2-
TIN
TOUT
ROUT
RIN
5K
SHDN
+
C3
+C4
1000pF
FIGURE 6. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
5µs/DIV
FIGURE 7. LOOPBACK TEST AT 120Kbps
T2
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (20µs/DIV)
FIGURE 5. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
6
FN6017.3
March 15, 2005
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