6520ACRZ View Datasheet(PDF) - Intersil

Part Name

Description

Manufacturer

6520ACRZ

Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

Intersil 

OUTPUT INDUCTOR

CURRENT

5A/DIV.

ISL6520A

controlled output voltage rise. The entire startup sequence

typically take about 11ms.

COMP/OCSET

1V/DIV.

VOUT

500mV/DIV.

TIME (5ms/DIV.)

FIGURE 1. OVERCURRENT OPERATION

The overcurrent function will trip at a peak inductor current

(IPEAK) determined by Equation 3:

IPEAK

=

I--O-----C----S----E----T-----x-----R-----O----C-----S----E---T--

rDS(ON)

(EQ. 3)

where IOCSET is the internal OCSET current source (20µA

typical). The OC trip point varies mainly due to the

MOSFET’s rDS(ON) variations. To avoid overcurrent tripping

in the normal operating load range, find the ROCSET resistor

from the equation above with:

1. The maximum rDS(ON) at the highest junction

temperature.

2. The minimum IOCSET from the specification table.

3.

Determine IPEAK for

where ΔI is the output

IPEAK

>

IOUT(MAX)

+

(---Δ----I---)

2

inductor ripple current.

,

For an equation for the ripple current see the section under

component guidelines titled “Output Inductor Selection” on

page 8.

Soft-Start

The POR function initiates the soft-start sequence after the

overcurrent set point has been sampled. Soft-start clamps the

error amplifier output (COMP pin) and reference input

(non-inverting terminal of the error amp) to the internally

generated soft-start voltage. Figure 2 shows a typical start-up

interval where the COMP/OCSET pin has been released from

a grounded (system shutdown) state. Initially, the

COMP/OCSET is used to sample the overcurrent setpoint by

disabling the error amplifier and drawing 20µA through

ROCSET. Once the overcurrent level has been sampled, the

soft-start function is initiated. The clamp on the error amplifier

(COMP/OCSET pin) initially controls the converter’s output

voltage during soft-start. The oscillator’s triangular waveform is

compared to the ramping error amplifier voltage. This

generates PHASE pulses of increasing width that charge the

output capacitor(s). When the internally generated soft-start

voltage exceeds the feedback (FB pin) voltage, the output

voltage is in regulation. This method provides a rapid and

6

TIME (2ms/DIV.)

FIGURE 2. SOFT-START INTERVAL

Current Sinking

The ISL6520A incorporates a MOSFET shoot-through

protection method which allows a converter to sink current

as well as source current. Care should be exercised when

designing a converter with the ISL6520A when it is known

that the converter may sink current.

When the converter is sinking current, it is behaving as a

boost converter that is regulating it’s input voltage. This

means that the converter is boosting current into the VCC

rail, which supplies the bias voltage to the ISL6520A. If there

is nowhere for this current to go, such as to other distributed

loads on the VCC rail, through a voltage limiting protection

device, or other methods, the capacitance on the VCC bus

will absorb the current. This situation will allow voltage level

of the VCC rail to increase. If the voltage level of the rail is

boosted to a level that exceeds the maximum voltage rating

of the ISL6520A, then the IC will experience an irreversible

failure and the converter will no longer be operational.

Ensuring that there is a path for the current to follow other

than the capacitance on the rail will prevent this failure

mode.

Application Guidelines

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These

interconnecting impedances should be minimized by using

wide, short printed circuit traces. The critical components

should be located as close together as possible, using ground

plane construction or single point grounding.

FN9016.6

December 10, 2009

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