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6269BIRZ Просмотр технического описания (PDF) - Intersil

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6269BIRZ High-Performance Notebook PWM Controller with Audio-Frequency Clamp Intersil
Intersil Intersil
6269BIRZ Datasheet PDF : 14 Pages
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ISL6269B
Electrical Specifications
PARAMETER
These specifications apply for TA = -40°C to +100°C, unless otherwise stated.
All typical specifications TA = +25°C, VCC = 5V, PVCC = 5V, VIN = 15V (Continued)
SYMBOL
TEST CONDITIONS
MIN TYP
PROTECTION
ISEN OCP Threshold
IOC
ISEN sourcing, TA = -10°C to +100°C
ISEN sourcing
19
26
17
26
ISEN Short-Circuit Threshold
UVP Threshold
OVP Rising Threshold
OVP Falling Threshold
OTP Rising Threshold (Note 3)
OTP Hysteresis (Note 3)
NOTE:
3. Guaranteed by characterization.
ISC
VUV
VOVR
VOVF
TOTR
TOTHYS
ISEN sourcing
-
50
81
84
113 116
100 103
-
150
-
25
MAX
33
33
-
87
119
106
-
-
UNIT
μA
μA
μA
%
%
%
°C
°C
Functional Pin Descriptions
GND (Bottom Pad)
Signal common of the IC. Unless otherwise stated, signals
are referenced to the GND pin, not the PGND pin.
VIN (Pin 1)
The VIN pin measures the converter input voltage which is a
required input to the R3 PWM modulator. Connect across
the drain of the high-side MOSFET to the GND pin.
VCC (Pin 2)
The VCC pin is the input bias voltage for the IC. Connect
+5V from the VCC pin to the GND pin. Decouple with at least
1µF of a MLCC capacitor from the VCC pin to the GND pin.
FCCM (Pin 3)
The FCCM pin configures the controller to operate in forced-
continuous-conduction-mode (FCCM) or diode-emulation-
mode (DEM.) DEM is disabled when the FCCM pin is pulled
above the rising threshold voltage VFCCMTHR, conversely
DEM is enabled when the FCCM pin is pulled below the
falling threshold voltage VFCCMTHF.
EN (Pin 4)
The EN pin is the on/off switch of the IC. The soft-start
sequence begins when the EN pin is pulled above the rising
threshold voltage VENTHR and VVCC is above the power-on
reset (POR) rising threshold voltage VVCC_THR. When the
EN pin is pulled below the falling threshold voltage VENTHF
PWM immediately stops.
COMP (Pin 5)
The COMP pin is the output of the control-loop error
amplifier. Compensation components for the control-loop
connect across the COMP and FB pins.
FB (Pin 6)
The FB pin is the inverting input of the control-loop error
amplifier. The converter output voltage regulates to 600mV
from the FB pin to the GND pin. Program the desired output
voltage with a resistor network connected across the VO,
FB, and GND pins. Select the resistor values such that FB to
GND is 600mV when the converter output voltage is at the
programmed regulation value.
FSET (Pin 7)
The FSET pin programs the PWM switching frequency.
Program the desired PWM frequency with a resistor and a
capacitor connected across the FSET and GND pins.
VO (Pin 8)
The VO pin measures the converter output voltage and is
used exclusively as an input to the R3 PWM modulator.
Connect at the physical location where the best output
voltage regulation is desired.
ISEN (Pin 9)
The ISEN pin programs the threshold of the OCP
overcurrent fault protection. Program the desired OCP
threshold with a resistor connected across the ISEN and
PHASE pins. The OCP threshold is programmed to detect
the peak current of the output inductor. The peak current is
the sum of the DC and AC components of the inductor
current.
PGND (Pin 10)
The PGND pin conducts the turn-off transient current
through the LG gate driver. The PGND pin must be
connected to complete the pulldown circuit of the LG gate
driver. The PGND pin should be connected to the source of
the low-side MOSFET through a low impedance path,
preferably in parallel with the trace connecting the LG pin to
the gate of the low-side MOSFET. The adaptive shoot-
through protection circuit, measures the low-side MOSFET
gate-source voltage from the LG pin to the PGND pin.
LG (Pin 11)
The LG pin is the output of the low-side MOSFET gate
driver. Connect to the gate of the low-side MOSFET.
6
FN6280.2
May 30, 2007
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