Transistors,MosFET ,Diode,Integrated circuits

# 6265AHRTZ Просмотр технического описания (PDF) - Intersil

6265AHRTZ Datasheet PDF : 23 Pages
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compared to the switching frequency, the output filter limits
the system transient response. The output capacitors must
supply or sink load current while the current in the output
inductors increases or decreases to meet the demand.
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is written as
Equation 17:
D
=
-V-----O---
VIN
(EQ. 17)
The output inductor peak-to-peak ripple current is written as
Equation 18:
IP-P
=
V-----O-------(---1-----–----D-----)
fSW L
(EQ. 18)
For this type of application, a typical step-down DC/DC
converter has an IP-P of 20% to 40% of the maximum DC
output load current. The value of IP-P is selected based upon
several criteria such as MOSFET switching loss, inductor core
loss, and the resistive loss of the inductor winding. The DC
copper loss of the inductor can be estimated by Equation 19:
PCOPPER
=
IL
O
A
2
D
D
C
R
(EQ. 19)
Where ILOAD is the converter output DC current.
The copper loss can be significant so attention must be given to
the DCR selection. Another factor to consider when choosing
the inductor is its saturation characteristics at elevated
temperature. A saturated inductor could cause destruction of
circuit components as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance CO
into which ripple current IP-P can flow. Current IP-P develops
a corresponding ripple voltage VP-P across CO, which is the
sum of the voltage drop across the capacitor ESR and of the
voltage change stemming from charge moved in and out of
the capacitor. These two voltages are written as shown in
Equation 20:
ΔVESR = IPP ESR
(EQ. 20)
and Equation 21:
VC
=
-----------I--P----P------------
8 CO fSW
(EQ. 21)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled
to reduce the total ESR until the required VP-P is achieved.
The inductance of the capacitor can cause a brief voltage dip
if the load transient has an extremely high slew rate. Capacitor
ESL can significantly impact output voltage ripple. Low
inductance capacitors should be considered. A capacitor
dissipates heat as a function of RMS current and frequency.
Be sure that IP-P is shared by a sufficient quantity of paralleled
capacitors so that they operate below the maximum rated
RMS current at FSW. Take into account that the rated value of
a capacitor can degrade as much as 50% as the DC voltage
across it increases.
Selection of the Input Capacitor
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capability must be sufficient to
handle the AC component of the current drawn by the upper
MOSFETs, which is related to duty cycle and the number of
active phases.
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and capable of
supplying the RMS current required by the switching circuit.
Their voltage rating should be at least 1.25x greater than the
maximum input voltage, while a voltage rating of 1.5x is a
preferred rating. Figure 11 is a graph of the input RMS ripple
current, normalized relative to output load current, as a
function of duty cycle for a single-phase regulator that is
0.60
0.55
0.50
IP-P,N = 1
IP-P,N = 0.50
IP-P,N = 0.75
0.45
0.40
0.35
IP-P,N = 0
0.30
0.25
IP-P,N = 0.25
0.20
0.15
0.10
0.05
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
DUTY CYCLE (VIN/VO)
FIGURE 11. NORMALIZED RMS INPUT CURRENT FOR
SINGLE PHASE CONVERTER
The normalized RMS current calculation is written as
Equation 22:
IIN_RMS, N =
D
(1
D)
+
1--D--2--⎠⎞
I P P ,N 2
(EQ. 22)
Where:
- IMAX is the maximum continuous ILOAD of the converter
- IPP,N is the ratio of inductor peak-to-peak ripple current
to IMAX
- D is the duty cycle that is adjusted to take into account
the efficiency of the converter which is written as:
D = -V----IV--N---O-----η--
(EQ. 23)
- where η is converter efficiency
Figure 12 provides the same input RMS current information
for two-phase designs.
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
20
FN6884.0
May 11, 2009