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IDT7204S120 View Datasheet(PDF) - Integrated Device Technology

Part NameIDT7204S120 IDT
Integrated Device Technology IDT
DescriptionCMOS ASYNCHRONOUS FIFO 2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9
IDT7204S120 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT7203/7204/7205/7206 CMOS ASYNCHRONOUS FIFO
2048 x 9, 4096 x 9, 8192 x 9 and 16384 x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)
Commercial
Com'l & Mil. Com'l
Military
Com'l
7203S/L12
7204S/L12
7203S/L15
7204S/L15
7205L15
7206L15
7203S/L20
7204S/L20
7205L20
7206L20
7203S/L25
7204S/L25
7205L25
7206L25
7203S/L30
7204S/L30
7205L30
7206L30
7203S/L35
7204S/L35
7205L35
7206L35
Symbol Parameters
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
fS
Shift Frequency
— 50 — 40 — 33.3 — 28.5 — 25 — 22.2 MHz
tRC
Read Cycle Time
20 — 25 — 30 — 35 — 40 — 45 — ns
tA
Access Time
— 12 — 15 — 20 — 25 — 30 — 35 ns
tRR
Read Recovery Time
8 — 10 — 10 — 10 — 10 — 10 — ns
tRPW
Read Pulse Width(2)
12 — 15 — 20 — 25 — 30 — 35 — ns
tRLZ
Read LOW to Data Bus LOW(3)
3 — 5 — 5 — 5 — 5 — 5 — ns
tWLZ
Write HIGH to Data Bus Low-Z(3, 4) 3 — 5 — 5
5 — 5 — 10 — ns
tDV
Data Valid from Read HIGH
5 — 5 — 5 — 5 — 5 — 5 — ns
tRHZ
Read HIGH to Data Bus High-Z(3) — 12 — 15 — 15 — 18 — 20 — 20 ns
tWC
Write Cycle Time
20 — 25 — 30 — 35 — 40 — 45 — ns
tWPW
Write Pulse Width(2)
12 — 15 — 20 — 25 — 30 — 35 — ns
tWR
Write Recovery Time
8 — 10 — 10 — 10 — 10 — 10 — ns
tDS
Data Set-up Time
9 — 11 — 12 — 15 — 18 — 18 — ns
tDH
Data Hold Time
0 — 0 — 0 — 0 — 0 — 0 — ns
tRSC
Reset Cycle Time
20 — 25 — 30 — 35 — 40 — 45 — ns
tRS
Reset Pulse Width(2)
12 — 15 — 20 — 25 — 30 — 35 — ns
tRSS
Reset Set-up Time(3)
12 — 15 — 20 — 25 — 30 — 35 — ns
tRTR
Reset Recovery Time
8 — 10 — 10 — 10 — 10 — 10 — ns
tRTC
Retransmit Cycle Time
20 — 25 — 30 — 35 — 40 — 45 — ns
tRT
Retransmit Pulse Width(2)
12 — 15 — 20 — 25 — 30 — 35 — ns
tRTS
Retransmit Set-up Time(3)
12 — 15 — 20 — 25 — 30 — 35 — ns
tRSR
Retransmit Recovery Time
8 — 10 — 10 — 10 — 10 — 10 — ns
tEFL
Reset to EF LOW
— 12 — 25 — 30 — 35 — 40 — 45 ns
tHFH, tFFH Reset to HF and FF HIGH
— 17 — 25 — 30 — 35 — 40 — 45 ns
tRTF
Retransmit LOW to Flags Valid
— 20 — 25 — 30 — 35 — 40 — 45 ns
tREF
Read LOW to EF LOW
— 12 — 15 — 20 — 25 — 30 — 30 ns
tRFF
Read HIGH to FF HIGH
— 14 — 15 — 20 — 25 — 30 — 30 ns
tRPE
Read Pulse Width after EF HIGH 12 — 15 — 20 — 25 — 30 — 35 — ns
tWEF
Write HIGH to EF HIGH
— 12 — 15 — 20 — 25 — 30 — 30 ns
tWFF
Write LOW to FF LOW
— 14 — 15 — 20 — 25 — 30 — 30 ns
tWHF
Write LOW to HF Flag LOW
— 17 — 25 — 30 — 35 — 40 — 45 ns
tRHF
Read HIGH to HF Flag HIGH
— 17 — 25 — 30 — 35 — 40 — 45 ns
tWPF
Write Pulse Width after FF HIGH 12 — 15 — 20 — 25 — 30 — 35 — ns
tXOL
Read/Write LOW to XO LOW
— 12 — 15 — 20 — 25 — 30 — 35 ns
tXOH
Read/Write HIGH to XO HIGH
— 12 — 15 — 20 — 25 — 30 — 35 ns
tXI
XI Pulse Width(2)
12 — 15 — 20 — 25 — 30 — 35 — ns
tXIR
XI Recovery Time
8 — 10 — 10 — 10 — 10 — 10 — ns
tXIS
XI Set-up Time
8 — 10 — 10 — 10 — 10 — 15 — ns
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Pulse widths less than minimum are not allowed.
3. Values guaranteed by design, not currently tested.
4. Only applies to read data flow-through mode.
2661 tbl 05
5.04
4
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