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IDT71216 View Datasheet(PDF) - Integrated Device Technology

Part Name
Description
Manufacturer
IDT71216 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
IDT71216
BiCMOS 16K x 15 CACHE-TAG RAM
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS
(VCC = 5.0V ± 5%, VCCQ = 5.0V ± 5% OR 3.3V ± 0.3V, TA = 0 to 70°C)
IDT71216S8
IDT71216S9 IDT71216S10
Symbol Parameter
Min. Max. Min. Max. Min. Max.
Read Cycle
tAAT
Address Access Time Tag Bits
10
11
12
tACST Chip Select Access Time Tag Bits
8
9
10
tCLZ(1) Chip Select to Tag and Status Bits in Low-Z 1
1
1
tCHZ(1) Chip Select to Tag and Status Bits in High-Z 1
5
1
6
1
6
tOET Output Enable to Tag Bits Valid
5
6
6
tOTLZ(1) Output Enable to Tag Bits in Low-Z
0
0
0
tOTHZ(1)
tTOH
tOES
tOSLZ(1)
tOSHZ(1)
Output Enable to Tag Bits in High-Z
Tag Bit Hold from Address Change
Output Enable to Status Bits Valid
Output Enable to Status Bits in Low-Z
Output Enable to Status Bits in High-Z
1
5
1
6
1
6
2
2
2
5
6
6
0
0
0
1
5
1
6
1
6
tAAS
tACSS
tSOH
Address Access Time Status Bits
Chip Select Access Time Status Bits
Status Bit Hold from Address Change
8
9
10
6
7
8
2
2
2
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 3) by device characterization, but is not production tested.
IDT71216S12
Min. Max. Unit
14
ns
12
ns
1
ns
1
7
ns
7
ns
0
ns
1
7
ns
2
ns
7
ns
0
ns
1
7
ns
12
ns
10
ns
2
ns
3067 tbl 11
AC ELECTRICAL CHARACTERISTICS (1)
(VCC = 5.0V ± 5%, VCCQ = 5.0V ± 5% OR 3.3V ± 0.3V, TA = 0 to 70°C)
IDT71216S8 IDT71216S9 IDT71216S10
Symbol
Parameter
Reset and Power Down Cycles
tSR
RESET Set-up Time
tHR
RESET Hold Time
Min. Max. Min. Max. Min. Max.
4
4
4
1
1
1
tSRST
tSHRS
tRSMI
tRSMV
tRSHZ(2)
tRSLZ(2)
tPDSR
tRHPL
tRHWL
tPD(2)
tPU(2)
tPDHZ(2)
tPDLZ(2)
tPUV
tWHPL(2)
tPUWL
Status Bit Reset Time
Status Bit Hold from RESET LOW
RESET LOW to MATCH and TA Invalid
RESET HIGH to MATCH and TA Valid
RESET LOW to TAG High-Z
RESET HIGH to TAG Low-Z
PWRDN Set-up to RESET LOW
RESET HIGH to PWDRN LOW
RESET HIGH to WET and WES LOW
PWRDN LOW to Low Power Mode
PWRDN HIGH to Active Power Mode
PWRDN LOW to Outputs in High-Z
PWRDN HIGH to Outputs in Low-Z
PWRDN HIGH to Outputs Valid
WET and WES HIGH to PWRDN LOW
PWRDN HIGH to WET and WES Active
50
60
60
2
2
2
9
10
10
110 —
120
120
9
10
10
90
100
100
30
30
30
1
1
1
90
95
95
50
50
50
0
0
0
9
10
10
0
0
0
50
50
50
5
5
5
50
50
50
NOTES:
1. Power-down mode is intended to be used during extended time periods of device inactivity.
2. This parameter is guaranteed with the AC Load (Figure 3) by device characterization, but is not production tested.
IDT71216S12
Min. Max. Unit
4
ns
1
ns
70
ns
2
ns
12
ns
— 130 ns
12
ns
— 110 ns
30
ns
1
— CLK
105 —
ns
50
ns
0
ns
12
ns
0
ns
50
ns
5
ns
50
ns
3067 tbl 12
14.3
7
 

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