DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

ICX285AL View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
ICX285AL Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ICX285AL
Absolute Maximum Ratings
Item
VDD, VOUT, φRG – φSUB
Vφ2A, Vφ2B φSUB
Against φSUB
Vφ1, Vφ3, Vφ4, VL φSUB
Hφ1, Hφ2, GND – φSUB
CSUB φSUB
VDD, VOUT, φRG, CSUB – GND
Against GND
Vφ1, Vφ2A, Vφ2B, Vφ3, Vφ4 – GND
Hφ1, Hφ2 – GND
Against VL
Vφ2A, Vφ2B – VL
Vφ1, Vφ3, Vφ4, Hφ1, Hφ2, GND – VL
Between input
clock pins
Voltage difference between vertical clock input pins
Hφ1 – Hφ2
Hφ1, Hφ2 – Vφ4
Storage temperature
Performance guarantee temperature
Operating temperature
Ratings
–40 to +12
–50 to +15
–50 to +0.3
–40 to +0.3
–25 to
–0.3 to +22
–10 to +18
–10 to +6.5
–0.3 to +28
–0.3 to +15
to +15
–6.5 to +6.5
–10 to +16
–30 to +80
–10 to +60
–10 to +75
*1 +24 V (Max.) when clock width < 10 µs, clock duty factor < 0.1%.
+16 V (Max.) is guaranteed for power-on and power-off.
Bias Conditions
Item
Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
Symbol
VDD
VL
φSUB
φRG
Min.
14.55
Typ.
15.0
*2
*3
*3
Max.
15.45
Unit Remarks
V
V
V
V
V
V
V
V
V
V
V
*1
V
V
°C
°C
°C
Unit Remarks
V
DC characteristics
Item
Supply current
Symbol
Min.
Typ.
Max.
Unit Remarks
IDD
9
11
mA
*2 VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the
V driver should be used.
*3 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within
the CCD.
–3–
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]