IC42S16100 View Datasheet(PDF) - Integrated Circuit Solution Inc

Part Name

Description

Manufacturer

IC42S16100

512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

Integrated Circuit Solution Inc 

IC42S16100

512K x 16 Bits x 2 Banks (16-MBIT)

SYNCHRONOUS DYNAMIC RAM

FEATURES

• Clock frequency: 200, 166, 143 MHz

• Fully synchronous; all signals referenced to a

positive clock edge

• Two banks can be operated simultaneously and

independently

• Dual internal bank controlled by A11 (bank select)

• Single 3.3V power supply

• LVTTL interface

• Programmable burst length

– (1, 2, 4, 8, full page)

• Programmable burst sequence:

Sequential/Interleave

• Auto refresh, self refresh

• 4096 refresh cycles every 64 ms

• Random column address every clock cycle

• Programmable CAS latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

• Burst termination by burst stop and precharge

command

• Byte controlled by LDQM and UDQM

• Package 400mil 50-pin TSOP-2

• Pb(lead)-free package is available

PIN DESCRIPTIONS

DESCRIPTION

ICSI's 16Mb Synchronous DRAM IC42S16100 is organized

as a 524,288-word x 16-bit x 2-bank for improved

performance. The synchronous DRAMs achieve high-speed

data transfer using pipeline architecture. All inputs and

outputs signals refer to the rising edge of the clock input.

PIN CONFIGURATIONS

50-Pin TSOP-2

VCC 1

I/O0 2

I/O1 3

GNDQ 4

I/O2 5

I/O3 6

VCCQ 7

I/O4 8

I/O5 9

GNDQ 10

I/O6 11

I/O7

12

VCCQ 13

LDQM 14

WE 15

CAS 16

RAS 17

CS 18

A11 19

A10 20

A0 21

A1 22

A2 23

A3 24

VCC 25

50 GND

49 I/O15

48 I/O14

47 GNDQ

46 I/O13

45 I/O12

44 VCCQ

43 I/O11

42 I/O10

41 GNDQ

40 I/O9

39 I/O8

38 VCCQ

37 NC

36 UDQM

35 CLK

34 CKE

33 NC

32 A9

31 A8

30 A7

29 A6

28 A5

27 A4

26 GND

A0-A11

A0-A10

A11

A0-A7

I/O0 to I/O15

CLK

CKE

CS

RAS

Address Input

Row Address Input

Bank Select Address

Column Address Input

Data I/O

System Clock Input

Clock Enable

Chip Select

Row Address Strobe Command

CAS

WE

LDQM

UDQM

Vcc

GND

VccQ

GNDQ

NC

Column Address Strobe Command

Write Enable

Lower Bye, Input/Output Mask

Upper Bye, Input/Output Mask

Power

Ground

Power Supply for I/O Pin

Ground for I/O Pin

No Connection

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors

which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

2

Integrated Circuit Solution Inc.

DR024-0D 06/25/2004

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