I5216-X View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

I5216-X

8 TO 16 MINUTE VOICE RECORD/PLAYBACK SYSTEM WITH INTEGRATED CODEC

Winbond 

1See Playback and Stop Cycle on page 62 for details.

I5216 SERIES

Advanced Information

PRELIMINARY

DATABYTES

In the I2C write mode, the device can accept data sent after the command byte. If a register load option

is selected, the next two bytes are loaded into the selected register. The format of the data is MSB first,

as specified by the I2C standard. Thus to load DATA<15:0> into the device, DATA<15:8> is sent first,

the byte is acknowledged, and DATA<7:0> is sent next. The address register consists of two bytes.

The format of the address is as follows:

ADDRESS<15:0> = PAGE_ADDRESS<10:0>, BLOCK_ADDRESS<4:0>

If an analog function is selected, the block address bits must be set to 00000. Digital Read and Write

are block addressable.

When the device is polled with the Read Status command, it will return three bytes of data. The first

byte is the status byte, the next is the upper address byte and the last is the lower address byte. The

status register is one byte long and its bit function is:

STATUS<7:0> = EOM, OVF, READY, PD, PRB, DEVICE_ID<2:0>

The lower address byte will always return the block address bits as zero, either in digital or analog

mode.

The functions of the bits are:

BIT#

7

6

5

NAME

EOM

OVF

READY

4 PD

3 PRB

2

1 DEVICE_ID

0

FUNCTION

Indicates whether an EOM interrupt has occurred.

Indicates whether an overflow interrupt has occurred.

Indicates the internal status of the device – if READY is LOW no new

commands should be sent to device.

Device is powered down if PD is HIGH.

Play/Record mode indicator. HIGH=Play/LOW=Record.

An internal device ID. This is 001 for the I5216.

It is good practice to read the status register after a Write or Record operation to ensure that the

device is ready to accept new commands. Depending upon the design and the number of pins

available on the controller, the polling overhead can be reduced. If INT\ and RAC are tied to the

microcontroller, the controller does not have to poll as frequently to determine the status of the I5216

Publication Release Date: November 30, 2001

-24

Revision A1

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