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HT66F20 View Datasheet(PDF) - Holtek Semiconductor

Part Name
Description
Manufacturer
HT66F20 Datasheet PDF : 246 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
Program Counter
During program execution, the Program Counter is used
to keep track of the address of the next instruction to be
executed. It is automatically incremented by one each
time an instruction is executed except for instructions,
such as ²JMP² or ²CALL² that demand a jump to a
non-consecutive Program Memory address. Only the
lower 8 bits, known as the Program Counter Low Regis-
ter, are directly addressable by the application program.
When executing instructions requiring jumps to
non-consecutive addresses such as a jump instruction,
a subroutine call, interrupt or reset, etc., the
microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
Device
HT66F20
HT66F30
HT66F40
HT66F50
HT66F60
Program Counter
Program Counter
High Byte
PCL Register
PC9, PC8
PC10~PC8
PC11~PC8
PCL7~PCL0
PC12~PC8
PC13~PC8
Program Counter
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writeable register.
By transferring data directly into this register, a short pro-
gram jump can be executed directly, however, as only
this low byte is available for manipulation, the jumps are
limited to the present page of memory, that is 256 loca-
tions. When such program jumps are executed it should
also be noted that a dummy cycle will be inserted. Manip-
ulating the PCL register may cause program branching,
so an extra cycle is needed to pre-fetch.
Stack
This is a special part of the memory which is used to
save the contents of the Program Counter only. The
stack has multiple levels depending upon the device
and is neither part of the data nor part of the program
space, and is neither readable nor writeable. The acti-
vated level is indexed by the Stack Pointer, and is nei-
ther readable nor writeable. At a subroutine call or
interrupt acknowledge signal, the contents of the Pro-
gram Counter are pushed onto the stack. At the end of a
subroutine or an interrupt routine, signaled by a return
instruction, RET or RETI, the Program Counter is re-
stored to its previous value from the stack. After a device
reset, the Stack Pointer will point to the top of the stack.
If the stack is full and an enabled interrupt takes place,
the interrupt request flag will be recorded but the ac-
knowledge signal will be inhibited. When the Stack
Pointer is decremented, by RET or RETI, the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
However, when the stack is full, a CALL subroutine in-
struction can still be executed which will result in a stack
overflow. Precautions should be taken to avoid such
cases which might cause unpredictable program
branching.
If the stack is overflow, the first Program Counter save in
the stack will be lost.
P ro g ra m C o u n te r
T o p o f S ta c k
S ta c k
P o in te r
S ta c k L e v e l 1
S ta c k L e v e l 2
S ta c k L e v e l 3
B o tto m o f S ta c k
S ta c k L e v e l N
P ro g ra m
M e m o ry
Device
HT66F20/HT66F30
HT66F40/HT66F50
HT66F60
Stack Levels
4
8
12
Arithmetic and Logic Unit - ALU
The arithmetic-logic unit or ALU is a critical area of the
microcontroller that carries out arithmetic and logic oper-
ations of the instruction set. Connected to the main
microcontroller data bus, the ALU receives related in-
struction codes and performs the required arithmetic or
logical operations after which the result will be placed in
the specified register. As these ALU calculation or oper-
ations may result in carry, borrow or other status
changes, the status register will be correspondingly up-
dated to reflect these changes. The ALU supports the
following functions:
· Arithmetic operations: ADD, ADDM, ADC, ADCM,
SUB, SUBM, SBC, SBCM, DAA
· Logic operations: AND, OR, XOR, ANDM, ORM,
XORM, CPL, CPLA
· Rotation RRA, RR, RRCA, RRC, RLA, RL, RLCA,
RLC
· Increment and Decrement INCA, INC, DECA, DEC
· Branch decision, JMP, SZ, SZA, SNZ, SIZ, SDZ,
SIZA, SDZA, CALL, RET, RETI
Rev. 1.10
20
February 1, 2010
 

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