HT45F4M
Lithium Battery Backup Power ASSP MCU
Watchdog Timer
The Watchdog Timer is provided to prevent program malfunctions or sequences from jumping to
unknown locations, due to certain uncontrollable external events such as electrical noise.
Watchdog Timer Clock Source
The Watchdog Timer clock source is provided by the internal fSUB clock which is in turn supplied
by the LIRC oscillator. The Watchdog Timer source clock is then subdivided by a ratio of 28 to
218 to give longer timeouts, the actual value being chosen using the WS2~WS0 bits in the WDTC
register. The LIRC internal oscillator has an approximate period of 32 kHz at a supply voltage of 5V.
However, it should be noted that this specified internal clock period can vary with VDD, temperature
and process variations.
Watchdog Timer Control Register
A single register, WDTC, controls the required timeout period as well as the enable/disable
operation. The WDTC register is initiated to 01010011B at any reset but keeps unchanged at the
WDT time-out occurrence in a power down state.
WDTC Register
Bit
7
Name
WE4
R/W
R/W
POR
0
6
WE3
R/W
1
5
WE2
R/W
0
4
WE1
R/W
1
3
WE0
R/W
0
2
WS2
R/W
0
1
WS1
R/W
1
0
WS0
R/W
1
Bit 7~3
Bit 2~0
WE4~WE0: WDT function software control
10101 or 01010: Enabled
Other: Reset MCU
When these bits are changed by the environmental noise to reset the microcontroller,
the reset operation will be activated after 2~3 LIRC clock cycles and the WRF bit in
the CTRL register will be set to 1.
WS2~WS0: WDT Time-out period selection
000: 28/fSUB
001: 210/fSUB
010: 212/fSUB
011: 214/fSUB
100: 215/fSUB
101: 216/fSUB
110: 217/fSUB
111: 218/fSUB
Rev. 1.10
41
January 15, 2013