ADM230LAQ View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADM230LAQ

+5V Powered CMOS RS-232 Drivers/Receivers

Analog Devices 

ADM223/ADM230L–ADM241L

S1

V+

FROM

VOLTAGE

DOUBLER

C2

S2

GND

S3

C4

S4

GND

V– = – (V+)

INTERNAL

OSCILLATOR

Figure 34. Charge-Pump Voltage Inverter

Capacitors C3 and C4 are used to reduce the output ripple.

Their values are not critical and can be reduced if higher levels

of ripple are acceptable. The charge pump capacitors C1 and

C2 may also be reduced at the expense of higher output imped-

ance on the V+ and V– supplies.

The V+ and V– supplies may also be used to power external cir-

cuitry if the current requirements are small.

Transmitter (Driver) Section

The drivers convert TTL/CMOS input levels into EIA-232-E

output levels. With VCC = +5 V and driving a typical EIA-232-E

load, the output voltage swing is ± 9 V. Even under worst case

conditions the drivers are guaranteed to meet the ± 5 V

EIA-232-E minimum requirement.

The input threshold levels are both TTL and CMOS compat-

ible with the switching threshold set at VCC/4. With a nominal

VCC = 5 V the switching threshold is 1.25 V typical. Unused in-

puts may be left unconnected, as an internal 400 kΩ pull-up re-

sistor pulls them high forcing the outputs into a low state.

As required by the EIA-232-E standard, the slew rate is limited

to less than 30 V/µs without the need for an external slew limit-

ing capacitor and the output impedance in the power-off state is

greater than 300 Ω.

Receiver Section

The receivers are inverting level shifters which accept EIA-

232-E input levels (± 5 V to ± 15 V) and translate them into 5 V

TTL/CMOS levels. The inputs have internal 5 kΩ pull-down

resistors to ground and are also protected against overvoltages of

up to ± 30 V. The guaranteed switching thresholds are 0.8 V

minimum and 2.4 V maximum which are well within the ± 3 V

EIA-232-E requirement. The low level threshold is deliberately

positive as it ensures that an unconnected input will be inter-

preted as a low level.

The receivers have Schmitt trigger inputs with a hysteresis level

of 0.5 V. This ensures error-free reception for both noisy inputs

and for inputs with slow transition times.

Shutdown (SD)

The ADM223, ADM230L, ADM235L, ADM236L and

ADM241L feature a control input that may be used to disable

the part and reduce the power consumption to less than 5 µW.

This is very useful in battery operated systems. During shut-

down the charge pump is turned off, the transmitters are dis-

abled and all receivers except R4 and R5 on the ADM223 are

put into a high-impedance disabled state. Receivers R4 and R5

on the ADM223 remain enabled during shutdown. This feature

allows monitoring external activity such as ring indicator moni-

toring while the device is in a low power shutdown mode.

The shutdown control input is active high on all parts except the

ADM223 where it is active low. Refer to Tables I and II.

Enable Input

The ADM235, ADM239, ADM241L and ADM223 feature an

enable input used to enable or disable the receiver outputs. The

enable input is active low on the ADM235L, ADM239L,

ADM241L and active high on the ADM223. Refer to Tables I

and II. When disabled, all receiver outputs are placed in a high

impedance state. This function allows the outputs to be con-

nected directly to a microprocessor data bus. It can also be used

to allow receivers from different devices to share a common data

line. The timing diagram for the enable function is shown in

Figure 35.

3V

EN*

0V

TEN

TDIS

ROUT

3.5V

0.8V

VOH – 0.1V

VVOL + 0.1V

*POLARITY OF EN IS REVERSED FOR ADM223.

Figure 35. Enable Timing

APPLICATION HINTS

Driving Long Cables

In accordance with the EIA-232-E standard, long cables are per-

missible provided that the total load capacitance does not exceed

2500 pF. For longer cables which do exceed this, then it is pos-

sible to trade off baud rate vs. cable length. Large load capaci-

tances cause a reduction in slew rate, and hence the maximum

transmission baud rate is decreased. The ADM230L-ADM241L

are designed so that the slew rate reduction with increasing load

capacitance is minimized.

For the receivers, it is important that a high level of noise immu-

nity be inbuilt so that slow rise and fall times do not cause mul-

tiple output transitions as the signal passes slowly through the

transition region. The ADM230L-ADM241L have 0.5 V of hys-

teresis to guard against this. This ensures that, even in noisy en-

vironments, error-free reception can be achieved.

High Baud Rate Operation

The ADM230L-ADM241L feature high slew rates permitting

data transmission at rates well in excess of the EIA-232-E speci-

fication. The drivers maintain ± 5 V signal levels at data rates up

to 100-kB/s under worst-case loading conditions.

REV. 0

–13–

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