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GM82C765 View Datasheet(PDF) - Hynix Semiconductor

Part Name
Description
Manufacturer
GM82C765
Hynix
Hynix Semiconductor Hynix
GM82C765 Datasheet PDF : 36 Pages
First Prev 31 32 33 34 35 36
GM82C765B
The Specify command sets the initial values for
each of the three internal timers. The HUT(Head
Unload Time) defines the time from the end of
the Execution phase of one of the Read Write
commands to the head unload state This timer is
programmable from 16 to 24Oms in increments
of 16ms.(01=16ms, 02=32ms …OF16=240ms).
The SRT (Step Rate Time) defines the time
interval between adjacent step pulses. This timer
is programmable from 1 to 16ms in increments of
1ms (F=1ms, E=2ms, D=3ms, etc.). The HLT
(Head Load Time) defines the time between
when the Head Load signal goes high and the
Read/Write operation starts. This timer is
programmable from 2 to 254ms in increments of
2ms (01=2ms, 02=4ms, 03=6ms …7F=254ms).
The time intervals mentioned above are a direct
function of the clock (CLK on pin 23). Times
indicated above are for a 16MHz clock; if the
clock was reduced to 8MHz, then all time
intervals are increased by a factor of 2.
Sense Drive Satus
This command may be used by the processor
whenever it wishes to obtain the status of the
FDDs. Status Register 3 contains the Drive
Status information stored internally in DFC
registers.
If an Invalid command is sent to the FDC (a
command not defined above), then the FDC will
terminate the command after bits 7 and 6 of
Status Register 0 are set to 1 and 0 respectively.
No interrupt is generated during this condition.
Bits 6 and 7 (DIO and RQM) in the Main Status
Register are both high (1), indicating to the
processor that the GM82C765B is in the Result
phase and the contents of Status Register 0
(STO) must be read. When the processor reads
Status Register 0, it will find an 80 hex,
indicating an Invalid command was received. A
Sense Interrupt Status command must be sent
after a Seek or Recalibrate interrupt; otherwise
the FDC will consider the next command to be an
invalid command.
GAP4a SYNC IAM GAP1 SYNC IDAM C
S
C GAP SYNC DATA AM DATA1 C GAP3 GAP4b
H
N
40x
6X
26x
6x
Y
E
R 11x
6x
FB OR F8
R
D
O
FF
00
FC
FF
00
FE
L
C
C FF
00
C
Index Repeat N Times
Fig 8. GM82C765B FM mode Format
GAP4a SYNC
GAP1 SYNC
IAM
IDAM
80x
12x
50x
12x
FF
00
3x
4E
00
3x
FC
FE
C2
A1
Index Repeat N Times
Fig 9. Gm82c765B MFM mode Format
C H S N C GAP2
Y D E O R 22x
L
C
C 00
SYNC
12x
00
DATA
AM
3x FB
A1 F8
DATA
1
C GAP3
R1
C
GAP4b
36
 

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